Advanced Electronic Circuit Design and Hardware Implementation

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Ardent Computech Pvt. Ltd. (ISO 9001:2008 company)
(Affiliated to NCVT, Govt. Of India)
www.ardentcollaborations.com - Kolkata | Durgapur | Bandel | Bhubaneswar
Advanced Electronic Circuit Design and Hardware Implementation with Verilog HDL
Software: Xilinx ISE
Harware:Xilinx Spartan 3E FPGA
Using Fundamental Gates
Learn how to create simple gates to design and test a hierarchical system. You will also
learn how to model a circuit using gate-level as well as module-instantiations using Xilinx
ISE Tools and the NI Digital Electronics FPGA Board.
Building a Clock Divider
Learn how to configure a Digital Clock Manager and use a clock-divider to display a blinking
LED. You will develop skills using the Xilinx ISE Tools such as the Create Project Wizard
and ISE Simulator to target the NI Digital Electronics FPGA Board.
Building a Combinatorial Circuit Using Behavioral Modeling
Create a combinatorial circuit using behavioral modeling that monitors 8 switch inputs and
outputs a number on the 2-digit 7-segment display of the NI Digital Electronics FPGA Board
when a switch is flipped.
Building a Combinatorial Circuit Using Data Flow Modeling
Extend your knowledge of data-flow modeling by creating a combinatorial circuit that looks
at a Binary-Coded Decimal (BCD) input and lights up one of the LEDs on the NI Digital
Electronics FPGA Board when the input is divisible by 3.
Building a Mux-Demux Circuit
Build on the knowledge gained in previous labs by building a combinatorial multiplexerdemultiplexer circuit using mixed-modeling Verilog HDL. This lab uses gate-level,
behavioral, and data-flow modeling and targets the NI Digital Electronics FPGA Board.
Building a Sequence Detector
Discover how you can build a sequence detector using the NI Digital Electronics FPGA
Board. In this lab, you'll learn how to create single always blocks using Xilinx ISE Tools.
Building a Finite State Machine
Learn the difference between using single always blocks and three always blocks by
modeling a finite state machine. In this lab, you will model a specified sequence counter
that targets the NI Digital Electronics FPGA Board.
Modeling Memory
Learn how to model memory as ROM by using the Xilinx ISE CORE Generator to
instantiate a complex memory structure that targets the NI Digital Electronics FPGA
Board.
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