BKLM_new_readout_requirements

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Requirements for new readout
electronics for barrel KLM in Belle II
GV 2/9/2016
Introduction
The readout electronics of the barrel KLM detector will be replaced for the upgrade to Belle II. The
reasons for this are: To interface to DAQ using the new standard fiber interface, to provide fast trigger
data for use in the trigger decision, to improve reliability (??), … The barrel KLM detector itself is not
being modified (except possibly for removal of some inner layers). It is highly desirable to re-use the
cables and racks from the old readout system, and also if feasible to re-use the crates and their internal
power supplies.
Interfaces for the bKLM readout are (diagram to be put in here): Detector cable, fiber out to DAQ, fiber
out to trigger decision logic, ?? in from trigger & clock source, ?? providing slow controls (or is that
shared from one of the three just mentioned?)
List of requirements
1) Requirement. Timing measurement on leading edges of pulses presented at signal inputs. Resolution
≤4 ns. Absolute time w.r.t. some start reference. Rollover period ≥ ?. [e.g. 24 bits is 67 ms]
a) Justification. Associate hits from a track. Match hits to
trigger. Reject (potentially) optical afterpulsing which
occurs on characteristic 40 ns time scale.
b) Justification. bKLM readout in Belle provided ?? ns
resolution for groups of ?? channels in logical OR.
c) Justification. In a typical modern FPGA, e.g., Xilinx XC6SLX..,
can easily run a 250 MHz counter and capture registers to
provide a 4 ns bin TDC. No interpolation or calibration
techniques will be necessary. High channel density is
feasible.
2) Requirement. Double pulse resolution ≤20 ns.
a) Justification. Reject (potentially) optical afterpulsing which
occurs on characteristic 40 ns time scale.
i) Note. It is conceivable to rely on ‘poor’ analog double-pulse
resolution, i.e., ‘latching’ to reject the afterpulses. But
preferable to see all and in digital processing drop what is
not wanted.
Figure 1. bKLM pulses (adapted from Belle
note 128)
3) Requirement. Sensitivity ≤4 mV. [I.e. the discriminator will
respond to a 4 mV transition.]
a) Justification. This is on the order of 10% of pulse height (see Figure 1).
i) Note. Incidentally, Belle note 122 remarks on a 10 mV sensitivity for the old readout. Although
from the MAX908 data sheet it should be something like 4 mV.
4) Requirement. Time walk from 5 to 40 mV threshold must be ≤4 ns. (With typical input pulse shape
seen in Figure 1).
a) Justification. Without correction, no significant loss of resolution.
5) Requirement. Input pulse rate. With no loss of performance, the readout system must handle input
pulse rates up to ??? (1kHz).
a) Justification. This is the maximum rate seen in the bKLM. (Leo – is this set by cosmics or by beam
events? I think you mentioned actually is cosmics?)
i) Note. This low value (compared with the typical pulse width) would allow for AC coupling the
inputs. I might want to do that actually.
6) Requirement. Threshold from DAC. (Per channel or in groups of xx??). Threshold setting range 0 –
100 mV. [MAYBE more? What was it really on old boards? 250 mV quoted in bn087, but maybe out
of date. Anyway we should have enough to be able to get a “complete” pulse height spectrum from
the detector.] Threshold setting resolution ≥7 bits.
a) Justification. Need to tune the thresholds to suit operational requirements. Range should exceed
maximum input pulse height. Resolution should allow for effective control and for instance for
monitoring of pulse heights from the detector with a precision of a few %.
b) Justification. If individual channel thresholds are provided, this might help recover problem
channels that would otherwise have to be masked. ??
i) Note. A slow control DAC channel costs < US$0.36 (LTC2636).
7) Requirement. Signal inputs. 48 signals are carried on a 50-conductor 0.050 inch pitch twist-n-flat
cable terminating to a KEL #8830E-100-170L-F connector on the frontend board. There should be 2
input connectors on a frontend board. Connector pinout mustl match the old frontend board.
a) Justification. It is highly desirable to re-use the existing cables.
b) Justification. It is probably desirable to maintain the same physical arrangement on connectors
on the readout electronics racks, to avoid ‘shuffling’ cables to a new pattern.
8) Requirement. Termination. Cable is driven single-endedly with ground reference at the detector.
Signal (differential) termination should be provided at the frontend board to match the cable (113 Ω
typically). Common-mode termination needs discussion. GV believes optimum may be to terminate
differentially only, but this is not the plan from old readout.
a) Justification. Reflections must be minimized.
i) Note. Detector is a mismatch to the cable. Reflections from the frontend board will return to the
frontend board without significant attenuation.
9) Requirement. Protection. Frontend must survive (without change of performance) ?? nC delivered
simultaneously to each input. [Ok we need to, maybe we can, insert here a test circuit diagram for
this.]
a) Justification. It happens. Frontend must survive.
10) Requirement. Internal analog test pulser enabled independently to each channel. Is simultaneous
(within frontend board) pulsing of channels required? Should test pulse amplitude be fixed or
adjustable? (Give amplitude spec in any case.)
a) Justification. Need to be able to verify channels are alive.
i) Note. We don’t plan to pulse synchronously across whole bKLM system. The test pulser is for
checking analog channel, not for generating fake track data to test trigger, etc. Such a thing can
be accomodated much better by preparing fake data in the FPGA and sending that to
DAQ/trigger.
11) Requirement. Event data. All (non-suppressed) hits in a defined window (start and stop w.r.t. the
trigger time) are bundled to an event record to ship to DAQ in response to trigger.
a) Justification. This is the primary data record.
12) Requirement. Supression of hits. Channels may be masked. Kill windows may be defined so that
afterpulses on same or neighboring channels may be killed.
a) Justification. Get rid of noisy channels, afterpulses, etc.
13) Requirement. Deadtime ≤50 µs. ??
a) Justification. Trigger rate is up to 1 kHz. Deadtime should be ≤5%. ??
i) Note. With the (probable) plan being to re-use the readout crates and use the VME backplane for
data gathering from frontend boards to readout controller board, there will be some deadtime
involved in the data readout. The fiber link is (probably) not the limiting element.
14) Requirement. Fast trigger data. All (non-suppressed) hits sent as to trigger system within ?? µs [ok
this is too vague, just a placeholder, need to refer to bKLM readout trigger output not to “trigger
system” and of course need a number. For this trigger output a coarse timing resolution (or even
just no timing resolution) may be used. Hits may be assigned to some periodic summary time
windows.
a) Justification. The trigger output will be used to [Leo please write this one completely…]
15) Requirement. Fiber interfaces. The DAQ and fast trigger data outputs will conform to the standards
for Belle II as documented in (xxx).
a) Justification. This is, of course, one of the main points of this upgrade.
16) Requirement. The readout system shall be composed of a number of frontend boards and readout
controller boards, linked in some manner, situated in crates in the bKLM readout racks. Ideally, the
crates are re-used from the old system and thus are 6U VME crates. Possibly the backplanes are reused and thus are 21-slot J1-only VME backplanes. Probably the power supplies of these crates are
re-used; we need to check on detailed ratings and voltages, they may notcomply with VME
standards since the old design was not using actual VME.
a) Justification. A modular design of frontend boards and a controller board is required for
serviceability and in order to optimize the utilization of fiber links (concentrating data from an
appropriate number of channels to the fibers).
b) Justification. Re-use of crates, especially if modifications can be avoided, will result in
considerable cost savings.
17) Requirement. Thermal environment. New bKLM readout boards shall be air cooled (modest airflow,
e.g. we can assume xxx ft/min (-> metric)). Ambient air temperature at crate air inlet is <23 °C.
a) Justification. Re-use of old infrastructure; realities of the environment.
18) Requirement. Radiation. There are no special considerations needed; radiation levels at the bKLM
readout racks are consistent with continuous human presence. Of course, there will still be SEU’s
including configuration upsets due to neutrons in the area – the bKLM readout needs to be able to
recover including to reconfigure its FPGA’s. How automated that has to be depends on rate of
occurrence…
a) Justification. No special requirement, no special justification.
19) Requirement. Magnetic field. The bKLM readout system must be operable with no loss of
performance in an external magnetic field ≤ 3 mT.
a) Justification. The Ambient magnetic field at the bKLM readout crates is ≤ 3 mT. [This should be
looked into a little more carefully if we do use transformer coupling or anything else potentially
sensitive to the field. I have only a general field plot from simulation, not really marked with
precise readout crate locations either.]
20) Requirement. Total channel count of new bKLM readout is 21696. Assuming match to the old
system, this is to be organized into 16 crates of generally 1356 channels per crate. Again assuming
match to old system, the crate is organized around 15 FEE boards of 96 channels each. Half of these
channels are for positive polarity and half for negative polarity.
a) Justification. Match the channel count and physical organization of the detector and existing
cables. There are 8 octants (phi segmentation), 15 layers, 2 modules per layer. In each layer
there are 48 z strips; in the first 7 layers there are 36 φ strips and in the outer 8 layers there are
48 φ strips. Thus 8×2×(7x(48+36)+8×(48+48))=21696. Signal polarity is opposite on φ and z
strips.
i) Note. This is 1 FEE board per layer (a.k.a. “superlayer”). If some inner layers are removed for Belle
II then the number of FEE boards per crate is reduced accordingly.
ii) Note. How are the 36-channel groups handled? 12 unused channels on some cables, presumably.
iii) Note. This is not a specification on the organization of fiber outputs to DAQ and trigger. There
may be 1 fiber of each type per crate, or more, or less (with some local daisy-chain).One fiber
(of each type) per rack may be a sensible plan. Gary in some of his slides suggests 86 fibers but
this seems excessive (on my first impression). Each fiber can support something like 200 MB/s I
am supposing (need to look at details there, it is a 2.5 Gb/s link), surely the whole bKLM does
not generate even 200 MB/s.
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