N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
WIDEBAND SOFTWARE DEFINED RADIO
DESIGN AND IMPLEMENTATION
Independent Study Project Proposal
Student Name:
Qaiser Asif
Supervisor Name:
Dr. Muhammad Khurram
Class Roll Number: CS – 026/12-13
M.Engg. Computer Systems Engineering
NED University of Engineering & Technology
N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
SUMMARY – Independent Study Project
Title
Supervisor
Researcher
Duration, Timeline
Goals
Wideband Software Defined Radio Design and Implementation
Dr. Muhammad Khurram
Qaiser Asif -- Roll # CS – 026/12-13, M.Engg, CIS Dept
Spring Semester 2014 – M.Engg. (CS)
1. Complete the research work within the given time.
2. Submit the completed hardware and software
3. Submit a research report and a research paper
Research Summary The primary goal is the design and development of an SDR platform
and the software implementation of reconfigurable signal processing
algorithms. In this project, wideband spectrum of signals between 88
to 108 MHz will be chosen to practically demonstrate the SDR
concept. An RF frontend will be designed to condition the wideband
RF signal. The conditioned RF signal will be fed to the fast analog to
digital converter (ADC) frontend. An FPGA based reconfigurable and
flexible digital frontend subsystem will be designed to interface the
ADCs, provide reconfiguration mechanism, on FPGA signal queues for
buffering, optional down conversion to digital intermediate
frequency (IF). The FPGA will also provide the interface between
FPGA and the General Purpose Processor (GPP) through PCI bus to
ensure real time processing of radio samples. The software will be
written on the GPP to perform complex communication functions
using DSP techniques.
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N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
Table of Contents
1.
Introduction .......................................................................................................................................... 3
2.
Motivation............................................................................................................................................. 3
3.
Project Summary................................................................................................................................... 3
4.
Project Methodology ............................................................................................................................ 4
4.1
Architecture .................................................................................................................................. 4
4.2
Signal Acquisition .......................................................................................................................... 4
4.3
Communication Interface with Host System ................................................................................ 5
4.4
System Software ........................................................................................................................... 5
5.
Input Signal Specifications .................................................................................................................... 6
6.
Project Deliverables .............................................................................................................................. 6
7.
Timeline................................................................................................................................................. 6
8.
Conclusion ............................................................................................................................................. 7
9.
References ............................................................................................................................................ 7
10.
Recommendations/Comments: ........................................................................................................ 9
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N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
1. Introduction
The purpose of the software defined radio – SDR is to create a highly flexible and
programmable wireless communication system in which the signal processing requirements can
be dynamically modified to adjust to the changing needs and requirements.
Software defined radio is the technology that enables to implement hardware circuits like
Encoder/Decoder, Modulator/Demodulator and other communication circuits on a software
execution platform utilizing digital signal processing (DSP) techniques. The software based
implementation rather than hardware provides flexibility and programmability that can change
the functionality of the system by just a software update.
2. Motivation
The motivation for the SDR is the realization of the dynamic changes that will entirely change
the future of wireless communication. As computational speeds increase, faster digital signal
processors and digital conversion technologies are being developed. There is increased
popularity of handheld devices and a growing dependency on mobile communication by public
departments such as police, fire departments, military, and civil emergency response offices.
The available bandwidth for this diverse customer base is finite. New technologies and
protocols are the key to meet current and future demands.
3. Project Summary
The primary goal is the design and development of an SDR platform and the software
implementation of reconfigurable signal processing algorithms. In this project, wideband
spectrum of signals between 88 to 108 MHz will be chosen to practically demonstrate the SDR
concept . An RF frontend will be designed to condition the wideband RF signal. The conditioned
RF signal will be fed to the fast analog to digital converter (ADC) frontend. An FPGA based
reconfigurable and flexible digital frontend subsystem will be designed to interface the ADCs,
provide reconfiguration mechanism, on FPGA signal queues for buffering, optional down
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N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
conversion to digital intermediate frequency (IF). The FPGA will also provide the interface
between FPGA and the General Purpose Processor (GPP) through PCI bus to ensure real time
processing of radio samples. The software will be written on the GPP to perform complex
communication functions using DSP techniques.
4. Project Methodology
4.1 Architecture
A digital receiver mainly comprises of two parts. First is the analog part and the other part is the
digital part. The analog part is the RF front end whose typical purpose is to receive the required
signal, filter it and provide the signal sufficient strength so that it can easily be converted into
digital words by means of ADCs. The digital part is used for IF signal processing of the signal.
After the signal processing has been performed, the real time signal processing tasks will be
handled in the software which requires a very high speed interconnection between the
software and the baseband hardware which in this case will be a PCI bus.
Figure 1: Basic block diagram of Software Defined Radio
4.2 Signal Acquisition
The signal acquisition will be performed by the high speed ADCs mounted on Xtreme DSP kit IV.
There are two ADC channels present on board. Each equipped with AD6645 ADC from Analog
Devices. Their resolution is up to 14-bits and sampling rate is of 105 MSPS. The sampling rate is
high enough to support wideband digitization. The ADCs are interfaced with the Xilinx Virtex-IV
FPGA which will be programmed using Verilog HDL.
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N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
4.3 Communication Interface with Host System
The high sampling rate A/D converters impose stringent requirements of a high speed interface
between the reconfigurable hardware and the GPP to transfer the digital samples in real time.
The high throughput requirement imposes two limitations in the existing GPP based
workstations. First, the existing workstations do not have a high speed port to connect an RF
frontend, creating a need to make a custom hardware. Second, the path between the device
driver and application is rather inefficient, requiring modifications to the operating system.
To cope up with this issue a first-in-first-out (FIFO) PCI will be designed. This interface is capable
of providing high throughput data transfer to the GPP while maintaining the real time system
requirement. After that it will be the responsibility of the application software to guarantee real
time signal processing.
Figure 2: Interface block diagram between Host PC and FPGA via PCI
4.4 System Software
The software running on the GPP will be written in a high level language (e.g. C#, C++ etc.)
running on Windows based platform. To ensure real time software execution, sample queues
will be maintained both in the system main memory and the reconfigurable FPGA based digital
frontend hardware. The software will be written such that any samples would not be lost and
data integrity would be ensured.
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N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
5. Input Signal Specifications
Following is the specifications of the signal
Table 1: Signal Specifications
Parameter
Value
Total Bandwidth - BW
20 MHz
Lowest frequency - fL
88 MHz
Highest frequency - fH
108 MHz
Channel bandwidth - BWCH
20KHz
Sampling rate
65 to 105 MSPS
ADC quantization
14 bits
6. Project Deliverables
The project deliverables are as follows:
1. Analog frontend to condition the RF signal of the antenna and prepare for digital
conversion.
2. Reconfigurable digital frontend to process the RF signal using DSP techniques and to
provide realtime interface to the GPP platform.
3. SDR software application.
4. A research report and a research paper in IEEE paper format.
7. Timeline
The project goals have to be accomplished within the complete duration of Fall Semester 2014
of Master of Engineering (Computer Systems) programme.
INCLUDE MONTHLY MILESTONES AND GANTT CHART HERE
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N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
Elapsed time from
S-No
start (in months)
Milestones
Deliverables
of the project
8. Conclusion
In this project, a complete SDR, consists of analog and digital frontends and GPP based software
running platform, will be designed and implemented. FM audio/music channels in the 88-108
MHz band will be received, processed and demodulated using SDR and DSP techniques. This
research project will open up the possibilities for others to study and enhance this SDR platform
in the department of Computer and Information Systems Engineering.
9. References
1. Muhammad Khurram and S. H. Mirza, "Wireless Transceiver Design Based on Software
Defined Radio Technology" in 4th International Bhurban Conference on Applied Sciences &
Tehnology, IBCAST, June 2005.
2. J. Mitola, “Software Radios Architecture”, IEEE National Communications Magazine, May
1995
3. Xavier Revés, Vuk Marojevic, Ramon Ferrús, Antoni Gelonch, “FPGA’S middleware for
software defined radio applications” in Field Programmable Logic and Applications
International Conference, 2005.
4. Alan C. Tribble, “The Software Defined Radio: Fact and Fiction” in Radio and Wireless
Symposium, Orlando, FL, 2008 IEEE
5. Bhandari, S.U. ; Subbaraman, S. ; Pujari, S. “Digital Signal Modulator on FPGA using On the
Fly Partial Reconfiguration” in Advances in Computing, Control, & Telecommunication
Technologies, 2009. ACT '09. International Conference, Trivandrum, Kerala
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N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
6. Bo Li, “Analysis and Design of Software Defined Radio” in International Conference on
Internet Computing and Information Services, 2011
7. A. I. Mecwan, N. P. Gajjar, “Implementation of Software Defined Radio on FPGA” in
Engineering (NUiCONE), 2011 Nirma University International Conference.
8. Walter H.W. Tuttlebee, “Software Defined Radio: Enabling Technologies (Wiley Series in
Software Radio)”
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N.E.D University of Engineering & Technology
Department of Computer and Information Systems Engineering
10. Recommendations/Comments:
Supervisor:
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Post Graduate Research Committee:
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M. Engg. Coordinator:
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Chairperson:
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Board of Studies:
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