ECFA HL-LHC Workshop
Electronics Session Summary
a
b
c
JP. Cachemiche
, bJ. Christiansenbb, P. Farthouat
, M. Garcia-Sciveres
, M.
b
d
b
Hansen , A. Kluge , A. Marchioro , P. Phillips , F. Vasey , A. Weidberge, K. Wyllieb
a
CPPM, 13288 Marseille, France
CERN, 1211 Genève 23, Switzerland
c
Lawrence Berkeley National Lab., Berkeley, CA, USA
d
STFC Rutherford Appleton Laboratory, Harwell Oxford, Chilton, Didcot, Oxon, OX11 0QX, UK
e
Physics Department, Denys Wilkinson Building, Keble Rd., Oxford OX1 3RH, UK
b
Contents
1. High Speed Links
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1. High Speed Links
High speed optical links have become a commodity in High Energy Physics experiments: their
unmatched bandwidth-distance product simply makes them indispensable to most data transport
networks. In the 2005-2008 timeframe, the LHC experiments deployed optical links to an
unprecedented scale for their readout systems, installing tens of thousands of point-to-point
links between their front-ends and counting rooms. The lessons learned by ATLAS and CMS
during the development, procurement, installation and commissioning of these systems have
been summarized in a joint technical note1. It highlights, among others, the need to increase link
bandwidth (to better amortize system cost), to share R&D effort (to better use the limited
resources available) and to enforce extensive and rigorous quality assurance programs (to
identify shortfalls as early as possible).
In comparison to the developments taking place in the HEP community, the deployment of
commercial optical data links has shown even more rapid progress. 10Gbps has become the
baseline datarate of newly installed physical channels, while 40G and 100G rates are being
considered for new Local Area Network deployments. 28Gbps serialiser/deserialisers are now
available from state-of-the-art FPGA parts, pushing the introduction of very fast links into a
wide variety of environments and systems. Despite this very impressive progress, the specific
constraints found in LHC detector front-ends often make it difficult to directly and immediately
benefit from the advances observed in commercial applications. To address these difficulties, a
significant development effort will be required in several areas, in view of the HL-LHC
upgrades:
i) High bitrate: the development of very high speed ASICs is made possible by the
availability of advanced deep submicron microelectronic technologies. The effort
required to qualify a new technology for HL-LHC applications and the resources
needed to access it do not allow our community to quickly track emerging
processes. Reaching a bit rate of 10G and qualifying the necessary technology is a
challenge to be addressed with highest priority.
ii) radiation tolerance: selected semiconductor lasers and photodetectors have been
demonstrated to survive fluences reaching 5x1015 particles/cm2 but this impressive
resistance will not extend much further. Such a limit will preclude the use of
optoelectronic devices in the innermost regions of HL-LHC detectors. For such
applications, new optoelectronic device types will need to be qualified, or low
mass high speed electrical links will need to be developed
iii) power efficiency: to cope with the limited cooling capacity of HL-LHC detectors,
all front-end electronics and optoelectronics will need to be power efficient. Low
power ASICs (and in particular serialiser/deserialiser ASICs) will need to be
designed using novel power saving features, especially for tracking detectors.
Directly modulated VCSELs (with projected dissipated power efficiencies of the
order of 10 mW/Gbps) will not match well the requirement for high speed at very
1
https://edms.cern.ch/document/882775/3.8
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low power. Building a low power link for tracker applications or a high density
link for calorimetry applications will require a substantial development effort.
iv) packaging and interconnecting electronic and optoelectronic components in a
reliable fashion is a delicate undertaking, exacerbated by the constant increase in
data rate. Commercial processes are often perceived as conservative (not meeting
our density or mass constraints) or out-of-reach (developed for high volume
applications with high entry cost) by our community, while custom developments
have resulted in fragile and unreliable assemblies jeopardizing the availability of
entire systems. The limited expertise of our community in the packaging and
interconnects area represents a high risk factor in the development of future high
speed links for HL-LHC. Our activities in this domain should be aggressively
reinforced and developed.
One common project addressing the above issues is the “radiation hard optical link” project,2
bringing developments in the microelectronic (GBT project) and optoelectronic (Versatile Link
project) areas under a common umbrella. Data rates of 4.8 Gbps have been reached with a full
custom chipset and with fully qualified optoelectronic components. Project completion is
expected in 2014 with the delivery of full component sets to ATLAS, CMS and LHCb.
The extension of this project to meet phase II upgrade requirements is requested by both
ATLAS and CMS experiments. Two flavours of optical links are under discussion, one
drastically reducing the chipset power dissipation (but maintaining operation at 4.8Gbps), and
another one increasing the bitrate to 10Gbps. These developments will require switching to a
new microelectronic technology (65nm), while trying to maintain in common as much of the
design as possible.
In parallel to launching full custom design efforts, it is known that there are privileged areas in
the experiments where off the shelf commercial links could be used. Being able to use standard
FPGA transceivers for instance in detector areas with modest radiation hardness requirements
would be a great relief to engineering teams struggling for resources. A well-coordinated
common effort in the qualification of radiation-soft high speed links and in the short listing of
recommended components is one attractive way of mitigating the risk of embedding off-theshelf components in our detectors. It should by all means be pursued in parallel to the custom
development projects.
The generic goal of increasing link bandwidth and density, improving radiation resistance and
decreasing power dissipation is a long term challenge. It necessitates constantly surveying and
validating emerging technologies and components. One potential paradigm shifting technology
is silicon photonics, bringing the promise of tightly integrating opto and front-end electronics.
A few groups in our community have started evaluating the technology. A concerted R&D
effort in this area will require gaining expertise with new materials and physical effects,
establishing evaluation projects with new companies and research partners, validating functional
2
http://ph-dep-ese.web.cern.ch/ph-dep-ese/optical_link/optical_link.html
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building blocks (waveguides, lasers, photodetectors, modulators), testing for radiation hardness,
and possibly even designing and fabricating devices tailored to HL-LHC needs.
Finally, the rapid and successful adoption of optical links in our community should not lead us
to believe that electrical data links are obsolete. Fast electrical links are needed in the pixel
locations to exit high radiation zones and in the low granularity regions of calorimeters and
muon detectors to feed remote high-speed aggregation nodes. The development of common
low power electrical links together with the support of the corresponding simulation tools
remains a key activity in the race for HL-LHC.
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