Experiment 8 Notes
V2
18
R1
365.4uA
40k
Rsig
50
C1
Q2N2222A
5.373mA
C2
10uF
0A
VOFF = 0.00000001 V3
VAMPL = 2.5
FREQ = 10kHz
0A
05.738mA
Q1
26.87uA
10uF
-5.400mA
Re
5.400mA
500
V
R2
338.5uA
10k
Rl V
5k
0A
0
3.0V
2.0V
1.0V
-0.0V
-1.0V
-2.0V
-3.0V
0s
V(V3:+)
20us
V(Rl:2)
40us
60us
80us
100us
Time
Vin = 2.499 V (Calculated)
Vout = 2.462 V (Calculated)
Av = 0.9849 V/V (Calculated)
120us
140us
160us
180us
200us
Ic = 5.4 mA (Calculated)
Since this amplifier is a common collector, the gain is 1. This circuit is also known as a unity gain
amp, or a buffer amp. The values we calculated result in a design that meets the required
specifications. The gain is 9.8, which is greater than the required 9.5. Output swing across load
is driven to 2.4 V which is greater than the 2 V required in the specifications.
Part 4 – Output Swing Clipping Limit
3.0V
2.0V
1.0V
-0.0V
-1.0V
-2.0V
-3.0V
0s
V(V3:+)
20us
V(Rl:2)
40us
60us
80us
100us
120us
140us
160us
180us
200us
Time
Clipping occurs around 2.5 V when the input is at 2.7 V as shown in Figure (INSERT FIGURE
HERE). (Calculated)
We used PSPICE to measure the output voltage at which our Vout begins to show distortion,
meaning the maximum voltage our amplifier is able to drive the output. In both our
experimental and PSPICE circuits, we were able to drive the load resistor to around 2.7V. This
surpasses the specified output swing of at least 2V across a 5kOhm load resistance.
Part 5 – Input Impedance
V2
18
R1
40k
Rsig
0
Q1
C1
Q2N2222A
7.5k
10uF
C2
V
VOFF = 0.00000001 V3
VAMPL = 2
FREQ = 10kHz
10uF
V
R2
10k
Re
500
Rl V
5k
0
2.0V
1.0V
0V
-1.0V
-2.0V
0s
V(V3:+)
20us
V(Rl:2)
40us
V(C1:1)
60us
80us
100us
Time
Resistor inserted = 7.5k (PSPICE)
Input Voltage = 2 V (PSPICE)
Resistor Voltage = 1 V (PSPICE)
Input Impedance Calculated = 7.5 kOhms (PSPICE)
120us
140us
160us
180us
200us
In experiment 6, we learned that we could essentially guess and check with various input
resistors to find out what the input impedance of our circuit was. This was done by inserting an
additional input resistor (Rn) with a value such that our Vn will be half the input voltage (Vin) of
the original circuit. We know this because whenever a voltage is passed through 2 equivalent
resistors in series, the voltage is divided in half. In Figure (INSERT FIGURE HERE), we see that
our original PSPICE input voltage is 1.99V, and when a 7.5kΩ resistor is inserted, the voltage
across that resistor becomes 0.99V. Therefore we can conclude that our input impedance (Zin) is
approximately 7.5kΩ. This coincides with the generalization that common collector amplifiers
have high input impedance, which explains why they are commonly used as the last stage in
multi-stage amplifiers.
Part 6 – Output Impedance
V2
18
R1
40k
Rsig
0
Q1
C1
Q2N2222A
500
VOFF = 0.00000001 V3
VAMPL = 100mV
FREQ = 10kHz
10uF
C2
10uF
V
V
R2
10k
Re
500
Rl
10
0
100mV
50mV
0V
-50mV
-100mV
0s
V(V3:+)
20us
V(Rl:2)
40us
60us
80us
100us
120us
140us
160us
180us
Time
Vin = 100mV (PSPICE)
Open circuit Vout = 98mV (PSPICE)
Resistor Inserted = 10 Ohms (PSPICE)
New Vout = 50 mV (PSPICE)
Output Impedance = 10 Ohms (PSPICE)
As with finding input impedance, we use a similar guess and check method to find output
impedance. This is done by first measuring the output voltage with an open (infinite) load
200us
resistance. In PSPICE, this is done by inserting a load resistance of < 1 MegaOhm, since pspice
doesn’t handle open circuits. Next, we increase the original load resistance such that the output
voltage (open load) is divided in half. Above in Figure (INSERT FIGURE HERE), we can see that
inserting a 10Ω resistor changes our output voltage from 98mV to 50mV. Therefore our output
impedance (Zout) is approximately 10Ω.