Rsig
50
VOFF = 0.00000001
V3
VAMPL = 2.5
FREQ = 10kHz 0A
V
0A
Experiment 8 Notes
V2
18
R1
C1
10uF
Q1
26.87uA
Q2N2222A
5.373mA
C2
R2
10uF
-5.400mA
Re
0
5.738mA
Rl
V
5k
0
0A
3.0V
2.0V
1.0V
-0.0V
-1.0V
-2.0V
-3.0V
0s
V(V3:+)
20us
V(Rl:2)
40us 60us 80us 100us
Time
120us 140us 160us 180us 200us
V in
= 2.499 V (Calculated)
V out
= 2.462 V (Calculated)
A v
= 0.9849 V/V (Calculated)

I c
= 5.4 mA (Calculated)
Since this amplifier is a common collector, the gain is 1. This circuit is also known as a unity gain amp, or a buffer amp. The values we calculated result in a design that meets the required specifications. The gain is 9.8, which is greater than the required 9.5. Output swing across load is driven to 2.4 V which is greater than the 2 V required in the specifications.
Part 4 – Output Swing Clipping Limit
3.0V
2.0V
1.0V
-0.0V
-1.0V
-2.0V
-3.0V
0s
V(V3:+)
20us
V(Rl:2)
40us 60us 80us 100us
Time
120us 140us 160us 180us
Clipping occurs around 2.5 V when the input is at 2.7 V as shown in Figure (INSERT FIGURE
HERE). (Calculated)
We used PSPICE to measure the output voltage at which our V out
begins to show distortion,
200us meaning the maximum voltage our amplifier is able to drive the output. In both our experimental and PSPICE circuits, we were able to drive the load resistor to around 2.7V. This surpasses the specified output swing of at least 2V across a 5kOhm load resistance.

Part 5 – Input Impedance
VOFF = 0.00000001
V3
VAMPL = 2
FREQ = 10kHz
V
Rsig
7.5k
C1
10uF
V
18
R1
40k
R2
10k
Q1
Q2N2222A
C2
10uF
Re
500
0
V2
Rl
V
5k
0
2.0V
1.0V
0V
-1.0V
-2.0V
0s
V(V3:+)
20us
V(Rl:2)
40us
V(C1:1)
60us 80us 100us
Time
120us 140us 160us 180us 200us
Resistor inserted = 7.5k (PSPICE)
Input Voltage = 2 V (PSPICE)
Resistor Voltage = 1 V (PSPICE)
Input Impedance Calculated = 7.5 kOhms (PSPICE)

In experiment 6, we learned that we could essentially guess and check with various input resistors to find out what the input impedance of our circuit was. This was done by inserting an additional input resistor (R n
) with a value such that our V n
will be half the input voltage (V in
) of the original circuit. We know this because whenever a voltage is passed through 2 equivalent resistors in series, the voltage is divided in half. In Figure (INSERT FIGURE HERE), we see that our original PSPICE input voltage is 1.99V, and when a 7.5kΩ resistor is inserted, the voltage across that resistor becomes 0.99V. Therefore we can conclude that our input impedance (Z in
) is approximately 7.5kΩ. This coincides with the generalization that common collector amplifiers have high input impedance, which explains why they are commonly used as the last stage in multi-stage amplifiers.

Part 6 – Output Impedance
VOFF = 0.00000001
V3
VAMPL = 100mV
FREQ = 10kHz
V
Rsig
500
C1
10uF
18
R1
40k
R2
10k
Q1
Q2N2222A
C2
10uF
Re
500
0
V2
Rl
V
10
0
100mV
50mV
0V
-50mV
-100mV
0s
V(V3:+)
20us
V(Rl:2)
40us 60us 80us 100us
Time
120us 140us 160us 180us
V in
= 100mV (PSPICE)
Open circuit V out
= 98mV (PSPICE)
Resistor Inserted = 10 Ohms (PSPICE)
New V out
= 50 mV (PSPICE)
Output Impedance = 10 Ohms (PSPICE)
As with finding input impedance, we use a similar guess and check method to find output impedance. This is done by first measuring the output voltage with an open (infinite) load
200us

resistance. In PSPICE, this is done by inserting a load resistance of < 1 MegaOhm, since pspice doesn’t handle open circuits. Next, we increase the original load resistance such that the output voltage (open load) is divided in half. Above in Figure (INSERT FIGURE HERE), we can see that inserting a 10Ω resistor changes our output voltage from 98mV to 50mV. Therefore our output impedance (Z out
) is approximately 10Ω.