ICE 3M1 – Digital Logic Design and Interfacing
Protecting the Computer
Setup for All Interfacing Activities
Protecting the Parallel Port
Supplies
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
Breadboard
74LS245 tri-state buffer chip
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Parallel Port Cable
Computer
Protecting the Computer
Because the interface facilitates the flow of electrical current between the computer and the
peripherals, it is important to protect the computer from potential electrical damage. Damage could
easily occur as a result of an interface drawing too much current from the parallel port, or sending too
much current or incorrect voltage back into the parallel port. For this reason, a buffer chip is
connected between the computer and any interface.
The 74LS245 Buffer Chip
Here is the schematic drawing for the 74LS245 chip:
All information being sent to or from the computer must be buffered through the 74LS245 chip.
When the 74LS245 chip is wired correctly, it acts as the new source for the input and output signals.
The parallel port therefore receives and sends information through the buffer chip. This chip will help
to isolate the computer from electrical problems with the interface.
The parallel port normally has eight output pins, pin2 through pin9, and these are called the data
outputs of the parallel port. When they are referred to as data lines, they are called D0 through D7,
and can be held high or 1, (voltage present), or low or 0, (no voltage present). These eight data lines
represent one bit of information each. When they are combined, they represent a whole byte of
ICE 3M1 – Digital Logic Design and Interfacing
Protecting the Computer
information, with D0 (pin2) being the least significant bit (20 , or 1), and D7 (pin9) being the most
significant bit (27 , or 128).
The 74LS245 chip conveniently has eight inputs and eight buffered outputs. Thus, any parallel port
output signals should leave the parallel port and enter A1 through A8 on the 74LS245 chip, and leave
through the B1 through B8 pins on the 74LS245 chip to the particular interface.
The parallel port has five input pins, pins 10 through 12, and pin 15. When they are referred to as data
input lines, they are I0 through I4, and can be held high or 1, (voltage present), or low or 0, (no
voltage present). These five input lines represent one bit of information each. They may combined, to
represent a larger value than just a “bit”, with I0 (pin10) being the least significant bit (20, or 1), and
I5 (pin15) being the most significant bit (25 , or 32).
A second buffer chip is required to carry the inputs from the interface back to the data input lines of
the parallel port. Thus, any particular interface signals that the computer needs to access should leave
the particular interface and enter A1 through A5 on the 74LS245 chip, and leave through the B1
through B5 pins on the 74LS245 chip to the parallel port data input lines
The 74LS245 chip is directional, and the direction of electrical current is selected by pin 1 on the chip
(the DIR or DIRECTION pin). This means that depending on the setting of pin 1 on the 74LS245
chip, the direction of the current can be either
 input from the “A” side and output to the “B” side of the chip, when DIR is held high, or 1
or
 input from the “B” side and output to the “A” side of the chip, when DIR is held low, or 0
To set the chip to receive the data on the Bus “A” side and send the data on the Bus “B” side:
 Pin 1 (DIR) must be set high (+5V)
 Pin 10 low (GND)
 Pin 19 (Ē, “not E”, or enable) low (ground)
 Pin 20 high (+5V)
To set the chip to receive the data on the Bus “B” side and send the data on the Bus “A” side:
 Pin 1 (DIR) must be low (ground)
 Pin 10 low (GND)
 Pin 19 (Ē, “not E”, or enable) low (ground)
 Pin 20 high (+5V)
The Ē “not E” enable pin 19, when low (“NOT not E” - enable), enables data to flow through the
chip (in either direction). When Ē “not E” is set high (“not E” – disable), no data flows through the
chip.
Steps
1. Insert a 74LS245 chip on the breadboard. The two rows of chip pins must plug into two different
rows with the channel of the breadboard in between the two rows of chip pins.
2. Connect the bottom rail to ground.
ICE 3M1 – Digital Logic Design and Interfacing
Protecting the Computer
3. Connect power to the top rail.
4. Connect pin 20 of the chip to the top rail.
5. Connect pin 10 to ground.
6. Connect pin 1 (DIR) to the top rail
7. Connect pin 19 (Ē) to ground.
8. You are now ready to connect your parallel port cable to the breadboard.
Questions
Complete the table
INPUTS
Ē (enable)
DIR (direction)
OUTPUT
L
Data flow from
to
L
Data flow from
to
H
Answer the questions:
1. How many pins does the 74LS245 chip have?
2. What is the purpose of the 74LS245 chip?
3. Which pin is ground?
4. Which pin powers the chip?