Electrodeposited Photoresists for
Wafer Applications
Innovative Chemical Solutions
for MEMS and Microelectronics
Nature of ED Resists
•
•
•
ED stands for electrodeposited
ED paint used by Ford since 1960
Emulsion of photoresist “Micelles” in water
- 50 – 150 microns
- Micelles contain the
resist components
Photoresist Micelle
- Micelles have a
Polymer
+ or - charge
Photo Active Compound
Solvents
© 2011 MicroChem Corp
Dye
Conformation on 3-D Structures
Deposits on all conductive surfaces
Intervia 3D-P
over thick
plated copper
© 2011 MicroChem Corp
Dow Electronic Materials ED Resists
Intervia 3D-N
• Negative tone image / cathodic wafer
(wafer has negative charge)
Intervia 3D-P
• Positive-tone image / anodic wafer
(wafer has positive charge)
© 2011 MicroChem Corp
Intervia 3D-N Coating Process
Micelles migrate to cathodic substrate
H2
NR3
+
+
NR3
+
NR3
+
NR3 -
Inert Anode
Conductive Wafer (Cathode)
O2
H2O
+
-
NR3
+
NR3
RCO2
NR3
+
+
NR3
+
NR3
-
NR3
+
RCO2
+
NR3
+
NR3
-
RCO2
-
RCO2
NR3
+
+
NR3
+
NR3
NR3
+
NR3
+
NR3
+
NR3
+
+
NR3
+
NR3
NR3
+
+
NR3
+
NR3
© 2011 MicroChem Corp
-
RCO2
-
RCO2
Self Limiting Behavior
resist
© 2011 MicroChem Corp
Deposition Current Profile
Deposition Current vs. Time
Deposition Current
Self Limiting Behavior
Near Zero Current
30s
Time
© 2011 MicroChem Corp
Intervia 3D-P Application Process
•
Resist Coating
•
Exposure 365 - 405 nm
- Coating Cycle
. 100 - 300 V DC
. 10 ASF peak
. Potential applied for 10 - 20 seconds
- Thickness Control
. Temperature
. Solvent
© 2011 MicroChem Corp
Thickness vs. Temperature
Thickness (microns)
Thickness vs. Temperature
Temperature (ºC)
© 2011 MicroChem Corp
Deposit Uniformity
Thickness Uniformity
Thickness
Uniformity
9
8
7
6
5
Position
Position
© 2011 MicroChem Corp
ge
Ed
er
en
t
C
ge
4
Ed
Thickness
(microns)
Thickness(microns)
10
ED Resist Comparison
• Intervia 3D-N
–
–
–
–
–
–
Negative working
6 – 100 µm final thickness
200-300 mJ/cm2 @365nm
Organic acid develop / strip
Acid and alkaline etches
Resistant to many plating
chemistries
© 2011 MicroChem Corp
ED Resist Comparison
• Intervia 3D-N
–
–
–
–
–
–
Negative working
6 - 100 µm final thickness
200-300 mJ/cm2 @365nm
Organic acid develop / strip
Acid and alkaline etches
Resistant to many plating
chemistries
• Intervia 3D-P
–
–
–
–
–
–
© 2011 MicroChem Corp
Positive working
6 µm target final thickness
250-400 mJ/cm2 @405nm
-CO -OH or TMAH develop
3,
Plating and acid etching
Hydroxide or organic
solvents
Tools
ED Resist Coater for R&D and
Low Volume Production
Semitool ED Cell
© 2011 MicroChem Corp
Problems with Spin-on Resists
100µm feature spin coated with 6.0 µm of
photoresist.
Image of 25µm lines patterned over the top of
45µm wide features
•Little or no coverage on outside corners
•Very thick coverage in inside corners and at
bottom of the feature
© 2011 MicroChem Corp
Coated Wafer Structures
SEM image of 6µm of electrophoretic
photoresist deposited over a series of 92µm
tall features.
SEM image showing 5µm of electrophoretic
photoresist deposited over a 300µm deep
trench.
© 2011 MicroChem Corp
Source: Semitool
Examples of Wafer Processes
Using Intervia ED Resists
© 2011 MicroChem Corp
16
Basic 3-D Test Structures
source: Meco
Sketch of proposed technology for
wafer-through hole interconnects
SEM Source: Meco
© 2011 MicroChem Corp
Set of 10, 20, 30 & 40 µm wide
test slits reproduced at 150µm
deep cavity
Ni Plated Structures on Polyimide
SEM photomicrographics of conformally electroplated Ni lines across
polyimide grooves using Intervia 3D-P electrodeposition
Source: Dow Electronic Materials
© 2011 MicroChem Corp
ShellCase Process
ShellOP for Image Sensors and Light Detection Devices
Dow ED Products
•Negative ED photoresist
•Developer
•Remover
© 2011 MicroChem Corp
Etching Conductive Vias with ED Resists
a) Photolithography on thick resist
a)
e)
b) Through-wafer etching (HDLP RIE)
c) Thermal oxidation and polysilicon
deposition (LPCVD)
b)
f)
d) CVD metallization (W or Cu) and
electro-plating (Cu only)
e) Electrodeposited resist deposition
c)
g)
f) Resist patterning by photo
lithography
g) Metal and polysilicon etching
d)
Source: Quate Group, Stanford University
h)
h) Photoresist removal
© 2011 MicroChem Corp
Backside Contacts
SEM micrograph of final through-wafer vias
Source: Lindedre, Baltes, Gnaednger
© 2011 MicroChem Corp
Backside Contacts
through-hole sidewall
SEM micrograph showing metallization
on {111} sidewalls for elimination of
uncontrolled light reflections.
Source: Lindedre, Baltes, Gnaednger
© 2011 MicroChem Corp
Philips Thru Via Imaging
© 2011 MicroChem Corp
Philips Thru Via Imaging
Quadruple leads in a single through-wafer hole and a toroid structure
© 2011 MicroChem Corp
Exposure Using Phase Gratings
UV light
photomask
substrate
side view
phase grating
cross
section
top view
Schematic view of 3-D exposure using phase gratings
Source: Philips
© 2011 MicroChem Corp
Plated Coils
© 2011 MicroChem Corp
Infineon ELASTec® Wafer Level Bumping
Intervia 3D-P Resist
Finished Bump
© 2011 MicroChem Corp
ELASTec® Process Steps
• Bump Print & Cure
• Seedlayer Sputter (Ti/Cu)
• Reroute Plating (Cu, Ni, Au)
2
1
• Resist Strip
• Seedlayer Etch
3
© 2011 MicroChem Corp
Elastic®
© 2011 MicroChem Corp
Silicon Optical Bench
2. Vias
2-D Diagram of SiOB-I. Number 1, 2 & 3 indicate the
regions where cross sections are taken for the
fabrication diagrams.
Design II Interconnect: Partially shielded microstrip.
(All dimensions are in microns)
Source: Banerjee, Drayton
© 2011 MicroChem Corp
Impact of Resist Tone on Printed Defects
© 2011 MicroChem Corp
Intervia 3D-N Typical Application Process
© 2011 MicroChem Corp
32
Intervia 3D-N Application Process
• Chemical Clean
– Preposit Cleaner 742
• Sulfuric acid based soak cleaner
• Removes fingerprints & soils
• 50 - 55 degrees C
• 2 - 3 minutes
© 2011 MicroChem Corp
Intervia 3D-N Application Process
• Chemical Clean
– Preposit Etch 748
• Monopersulfate etchant
• Micro roughens copper (0.5 - 1.0 µm)
• 30°C
• 2 - 3 minutes
© 2011 MicroChem Corp
Intervia 3D-N Application Process
• Resist Coating
– Resist is sparged upon entry to fully wet the part
– Vibration of parts may be used in some applications to
release air bubbles
– Part to be coated is the cathode
– Stainless steel anodes
© 2011 MicroChem Corp
Intervia 3D-N Coating Cycle
H2
NR3
+
+
NR3
+
NR3
+
NR3 -
Inert Anode
Conductive Wafer (Cathode)
O2
H2O
+
-
NR3
+
NR3
RCO2
NR3
+
+
NR3
+
NR3
-
NR3
+
RCO2
+
NR3
+
NR3
-
RCO2
-
RCO2
NR3
+
+
NR3
+
NR3
NR3
+
NR3
+
NR3
+
NR3
+
+
NR3
+
NR3
NR3
+
+
NR3
+
NR3
© 2011 MicroChem Corp
-
RCO2
-
RCO2
Intervia 3D-N Coating Cell
Vibrator
Spargers
SS Anode
Part to be Coated
© 2011 MicroChem Corp
Intervia 3D-N Application Process
• Resist Coating
– Coating Cycle
• 100 - 300 V DC
• 10 ASF peak
• Potential applied for 10 - 20 seconds
– Thickness Control
• Temperature
• Coating Time
• Voltage
© 2011 MicroChem Corp
Typical Tmin Curve for Intervia 3D-N
© 2011 MicroChem Corp
Intervia 3D-N Application Process
•
Conservation Rinse
– Reclaims resist drag-out
– Conservation resist is ultrafiltered to reclaim solids
•
D.I. Final Rinse
© 2011 MicroChem Corp
Intervia 3D-N Topcoat
•
Contains cellulose-based material in water
– Reduces tack of coating
– Reduces edge recession
– Dissolves quickly during development step
© 2011 MicroChem Corp
Intervia 3D-N Application Process
•
Air knives
– Remove bulk moisture
– Promotes uniform drying
•
Convection Dry
– 105°C
– 10 minutes
© 2011 MicroChem Corp
Intervia 3D-N Application Process
•
Exposure
– 300 mJ/cm2 required at 5 micron resist thickness
– 365 nm peak
– Intensity affects required dose
• Subject to Low Intensity Reciprocity Law Failure (LIRLF)
• 10 mW/cm2 minimum recommended
© 2011 MicroChem Corp
Intervia 3D-N Application Process
•
Development
–
–
–
–
Intervia 3D-N Developer
38 - 42°C
Clear time 30 - 120 seconds
50% breakpoint
© 2011 MicroChem Corp
Intervia 3D-N Application Process
•
Plating
–
–
–
–
•
Cupronal BP (copper)
Auronal BP (gold)
Solderon BP ( tin lead, lead free, low alpha lead)
Nikal BP (nickel)
Etching
– Cupric Chloride
– Ferric Chloride
© 2011 MicroChem Corp
Intervia 3D-N Application Process
•
Stripping
–
–
Intervia 3D-N Remover
50 - 65°C
© 2011 MicroChem Corp
Microfabrication Capabilities
• Etched features with 0.2 um tolerances
• Deep (through-wafer) etching
• Contoured plated features (photoresists
and metals)
• Submicron multilayer feature-to-feature
alignment
• Submicron die bonding
• Conformal AR coatings
© 2011 MicroChem Corp
MicroChem would like to thank Dow Electronic Materials
for providing these materials…
…and thank you for your time and attention.
© 2011 MicroChem Corp
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