Memory Management 1
Tanenbaum Ch. 3
Silberschatz Ch. 8,9
Background
System
User 1
User 2
User 3
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Creating an Executable File
prog.c
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Creating an Executable File
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prog.c
sqrt.c
Compiler
Compiler
prog.o
sqrt.o
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Creating an Executable File
prog.c
sqrt.c
Compiler
Compiler
prog.o
sqrt.o
Linker
Library
prog.exe
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Address Binding
• Compile Time
– Specify the physical memory locations during the
compile.
• Load Time
– Determine physical addresses when all modules
are combined into a load module and loaded into
memory
• Execution Time
– Bind addresses when module is executed (to
allow flexibility in moving process during
execution).
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No Memory Abstraction
Figure 3-1. Three simple ways of organizing memory with an
operating system and one user process.
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Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
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Multiple Programs Without Memory
Abstraction
Figure 3-2. Illustration of the relocation problem.
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Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
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Hardware support for relocation
Limit
Register
CPU
<
Relocation
Register
+
Memory
addressing
error:
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Hardware support for relocation
Limit
Register
CPU
<
Relocation
Register
+
Memory
addressing
error:
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Base and Limit Registers
Figure 3-3. Base and limit registers can be used to give each
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process a separate address space.
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Swapping
• Move a currently executing process
temporarily out of memory and into a
backing store to make room for a new
(higher priority?) process.
• Typically uses load time binding, but
can use execution time binding.
• Context switching time can be high
– 100k / 1000k = 100 milliseconds
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Swapping (1)
Figure 3-4. Memory allocation changes as processes come into
memory and leave it. The shaded regions are unused memory.
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Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
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Swapping (2)
Figure 3-5. (a) Allocating space for growing data segment. (b)
Allocating space for growing stack, growing data segment.
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Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
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Manage Free Memory
• With Bit Maps
• With Linked Lists
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Memory Management with Bitmaps
Figure 3-6. (a) A part of memory with five processes and three
holes. The tick marks show the memory allocation units. The
shaded regions (0 in the bitmap) are free. (b) The
corresponding bitmap. (c) The same information as a list.
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Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
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Memory Management with Linked Lists
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Figure 3-7. Four neighbor combinations
for the terminating process, X.
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
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Early Memory Management
Techniques
• Fixed Partitioning
– Simple to Implement but inefficient use of
memory
• Dynamic Partitioning
– No internal fragmentation, but inefficient use of
processor
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Fixed Partitioning
OS
8 meg
8 meg
8 meg
8 meg
8 meg
8 meg
8 meg
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Fixed Partitioning
OS
8 meg
8 meg
OS
2 meg
4 meg
6 meg
8 meg
8 meg
8 meg
8 meg
8 meg
8 meg
12 meg
16 meg
8 meg
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Dynamic Partitioning
• Was used by IBM (OS/MVT)
• Create partitions when needed
OS
P1
P2
P3
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Dynamic Partitioning
• Was used by IBM (OS/MVT)
• Create partitions when needed
OS
OS
P1
P2
P3
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P1
!P2
P3
22
Dynamic Partitioning
• Was used by IBM (OS/MVT)
• Create partitions when needed
OS
P1
P2
P3
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OS
OS
P1
P1
!P2
P4
P3
P4
P3
23
Dynamic Partitioning
• Was used by IBM (OS/MVT)
• Create partitions when needed
OS
P1
P2
P3
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OS
OS
P1
P1
!P2
P4
P3
P4
P3
OS
!P1
P4
P3
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Dynamic Partitioning
• Was used by IBM (OS/MVT)
• Create partitions when needed
OS
P1
P2
P3
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OS
OS
P1
P1
!P2
P4
P3
P4
P3
OS
OS
P5
!P1
P4
P3
P5
P4
P3
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Placement Algorithms
• First-fit
– Use the first available hole that will work
• Next-fit
– Search continues from where last allocation was made
• Best-fit
– Consider all available holes and use the one that most
closely fits.
• Worst-fit
– Consider all available holes and use the one that
leaves the largest remaining free hole.
• Quick Fit
– Maintain separate lists of more common sizes
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Logical vs. Physical Address Space
• Logical Address
– Referred to in executing programs
– Generated by CPU (also known as virtual address)
• Physical address
– Refers to an actual storage location in memory.
• Memory Management is the process of mapping
logical addresses to the appropriate physical
address.
• Relocation register used to map between domains
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Paging
• Difficult to find memory holes large enough to
satisfy new process needs.
• Simplify the problem: Break the process
memory requirements into many smaller
sized lots.
• Divide physical memory into fixed size blocks
called frames (typically 512 to 16 meg)
• Divide logical memory (process memory
needs) into same sized blocks called pages
• Allocate as many frames as needed
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Address Translation
Architecture
logical address
physical address
Physical
Memory
CPU
Page
Table
f
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Address Translation
Architecture
logical address
p
physical address
d
d
Physical
Memory
CPU
{
p
Page
Table
f
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Address Translation
Architecture
logical address
p
physical address
d
f
d
Physical
Memory
CPU
{
p
Page
Table
f
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Paging Example
0
Page 0
Page 0
Page 1
2
Page 2
Page 3
logical
memory
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1
0
1
2
3
1
4
3
7
page
table
Page 2
Page 1
physical
3
memory
4
5
6
Page 3
7
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Paging Example
0
Page 0
Page 0
Page 1
2
Page 2
Page 3
logical
memory
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0
1
2
3
1
4
3
7
page
table
Page 2
Page 1
physical
3
memory
4
5
6
Page 3
7
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Paging Example
0
Page 0
Page 0
Page 1
2
Page 2
Page 3
logical
memory
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0
1
2
3
1
4
3
7
page
table
Page 2
Page 1
physical
3
memory
4
5
6
Page 3
7
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Virtual Memory – Paging
Figure 3-8. The position and function of the MMU – shown as
being a part of the CPU chip (it commonly is nowadays).
Logically it could be a separate chip, was in years gone by.
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Paging
Figure 3-10. The internal operation of the MMU with
16 4-KB pages.
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Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
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Structure of Page Table Entry
Figure 3-11. A typical page table entry.
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Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
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Speeding Up Paging
Paging implementation issues:
•
•
The mapping from virtual address to physical
address must be fast.
If the virtual address space is large, the page table
will be large.
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Summary
• Memory Management Background
• Memory Partitioning
• Paging
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Questions
• Explain the difference between logical address space
and physical address space. Which parts of a computer
system use logical addresses and which parts use
physical addresses?
• When considering dynamic memory partitioning, what is
the major disadvantage of the “best fit” algorithm? What
is the advantage of the “worst fit” algorithm?
• How (where) is virtual memory managed in
contemporary computer systems?
• In an MMU why would we ever want to disable caching?
• The book suggests that page sizes range from 512 bytes
to perhaps 64kbytes. What are the advantages of a
small page size? When is a large page size preferred?
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