SYEN 3330
Digital Systems
Chapter 4 – Part 2
SYEN 3330 Digital Systems
Jung H. Kim 1
Overview of Chapter 4 – Part 2
• Programmable Logic Technologies
•
•
•
•
•
Introduction
Read-Only Memory
Programmable Logic Array
Programmable Array Logic
VLSI Programmable Logic
SYEN 3330 Digital Systems
Chapter 4-2
Page 2
Programmable Logic
IC C ost D ilem m a:
 IC logic circu it d en sity in creases exp on en tially w ith tim e.
 T h e m ore IC s you m ak e, th e ch eap er th ey get.
 C om p lex logic IC s h ave very sp ecific fu n ction s (so you m ak e
few er).
Q u estion : H ow d o I m ak e very h igh volu m e p arts th at are
very d en se?
A n sw er #1: Y ou m ak e m icrop rocessors or IC s (lik e
au tom ob ile ign ition con trollers) th at h ave very large volu m e.
OR
A n sw er #2: Y ou m ak e p rogram m ab le p arts.
SYEN 3330 Digital Systems
Chapter 4-2
Page 3
Programmable Part Types
 S em icon d u ctor m an u factu rers h ave d evelop ed several typ es of
regu lar p rogram m ab le logic elem en ts. T h ree im p ortan t on es
are:
1. R ead O n ly M em ory (R O M ) -- a fixed array of A N D gates an d a
p rogram m ab le array of O R gates.
2. P rogram m ab le A rray L ogic (P A L ) -- a p rogram m ab le array of
A N D gates feed in g a fixed array of O R gates.
3. P rogram m ab le L ogic A rray (P L A ) -- a p rogram m ab le array of
A N D gates feed in g a p rogram m ab le array of O R gates.
 A ll of th e ab ove u se regu lar stru ctu res of logic elem en ts th at
can b e th ou gh t of as a " m em ory array" . T h ere are also
p rogram m ab le d evices th at look m ore lik e p rogram m ab le
logic cells w ith p rogram m ab le in tercon n ect.
SYEN 3330 Digital Systems
Chapter 4-2
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Programming Devices
 D evices m ay b e:
1. P erm an en tly p rogram m ed at th e tim e of IC m an u factu re,
2. P rogram m ed at th e tim e of u se (b oard level
m an u factu rin g), or
3. D yn am ically re-p rogram m ed d u rin g u se.
 P erm a n en t p ro g ra m m in g tech n iq u es d o n e a t th e tim e o f
m a n u fa ctu re in clu d e fin a l lev el in terco n n ect a d d itio n v ia
m eta liza tio n o r d ev ice a ltera tio n th ro u g h la ser o r e -b ea m
p ro g ra m m in g
 U se tim e p ro g ra m m in g tech n iq u es in clu d e sh o rtin g d io d es,
b lo w in g fu ses, sh o rtin g d ev ices, a n d d u m p in g ch a rg e in to
w ells.
 D y n a m ica lly rep ro g ra m m ed d ev ices ca n b e b u lk era sed
a n d rep ro g ra m m ed , o r in crem en ta lly era sed a n d
rep ro g ra m m ed .
SYEN 3330 Digital Systems
Chapter 4-2
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Read Only Memory
 Read Only Memories (ROM) or Programmable Read
Only Memories (PROM) have:
1. N input lines,
2. M output lines, and
3. 2N decoded minterms.
 The N input lines are connected to a fixed decoder AND array of
2N lines. Each line represents a minterm of N variables. Thus
there are 2N decoded minterms.
 Each of the M outputs lines are connected to an OR gate which has
a programmable number of input connections. Any (or all) of the
minterms may be ORed together for each of the M output lines.
 A program map for a PROM (or ROM)
LOOKS LIKE A MULTIPLE OUTPUT FUNCTION TABLE.
SYEN 3330 Digital Systems
Chapter 4-2
Page 6
Read Only Memories (Continued)
 E xam p le: A 8 X 4 R O M (N
= 3 in p u t lin es, M = 4
ou tp u t lin es)
 T h e fixed " A N D " array is
a d ecod er w ith 3 in p u t b its
to on e-of-8 m in term ou tp u t A
B
lin es.
 T h e p rogram m ab le " O R "
array is sh ow n as a " W ire O R " fu n ction . A " D ot" in
th e array corresp on d s to
in clu d in g th at m in term .
SYEN 3330 Digital Systems
C
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
F0
F1
Chapter 4-2
F2
F3
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Read Only Memories (Continued)
 T h e 32 X 8 R O M exam p le
corresp on d s to th e
m u ltip le ou tp u t tru th
tab le:
 T h e " in tern a l
o rg a n iza tio n " o f th e
m em o ry a rra y o ften d o es
n o t m a tch th e " lo g ica l
o rg a n iza tio n " .
Input
ABC
000
001
010
011
100
101
110
111
Output
F0 F1 F2 F3
1 1 0 1
0 0 0 0
1 0 0 1
0 0 1 0
0 0 0 0
1 0 1 0
0 0 0 1
0 1 0 0
 F or exam p le, on e m an u factu re sells an N = 13 (in p u ts
d ecod ed to 8192 m in term s) b y M = 8 (ou tp u ts) P R O M
th at is in tern ally organ ized as a 128 row s b y 512
colu m n s b it array. A n ou tp u t M U X selects a grou p
of 8 b its.
SYEN 3330 Digital Systems
Chapter 4-2
Page 8
Programmable Array Logic (PAL)
 P A L d evices are closely related to th e R O M in th at th e d evice is
organ ized as a regu lar array of p rogram m ab le elem en ts.
 T h e P A L h as a p rogram m ab le set of A N D term s, com b in ed w ith a
lim ited n u m b er of fixed O R term s.
 W h ere th e R O M array is gu aran teed to im p lem en t an y fu n ction of
N in p u ts, th e P A L m ay ru n ou t of O R term s. T h u s, it m ay b e very
im p ortan t to m in im ize th e n u m b er of O R term s in ord er to u se a
PAL.
 A n oth er d ifferen ce is th at a R O M d oes n ot easily allow m u lti -level
im p lem en tation s. T h e d esign e r m u st u se sep arate R O M s for
m u ltip le levels. T h e P A L allow s ou tp u ts from O R term s to b e u sed
as in p u ts to A N D term s, m ak in g m u lti-level d esign easy.
SYEN 3330 Digital Systems
Chapter 4-2
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Programmable Array Logic (Cont.)
In1
 E xam p le: 4 In p u t,
3 O u tp u t P A L
w ith fixed , 3 -in p u t
O R term s an d
In2
p rogram m ab le
p olarity ou tp u ts.
Out1
"0"
Out2
In3
"0"
 T h is d evice is
u n p rogram m ed .
Out3
"0"
In4
SYEN 3330 Digital Systems
Chapter 4-2
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Programmable Array Logic (Cont.)
 An "X" at a cross line
includes that variable in
the AND term. An "X"
in an AND gate removes
that term. An "X" at
the EXOR forms a
"TRUE" term, else the
output is complemented.
Thus we have:
Out1 =
(In1In2'In3 + In1')'
In1
Out1
In2
"0"
Out2
In3
"0"
Out3
"0"
In4
 Note that Out1 leaves the PAL in COMPLEMENT
form, since the EXOR is tied to one. Out2 is shown in
"TRUE" form.
SYEN 3330 Digital Systems
Chapter 4-2
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Programmable Array Logic (Cont.)
 W h at are th e
In1
eq u ation s for th e
oth er term s?
Out1
In2
"0"
Out2
In3
"0"
Out3
"0"
In4
SYEN 3330 Digital Systems
Chapter 4-2
Page 12
Programmable Logic Array (PLA)
 The last type of programmable logic element we will
discuss is the PLA which has a programmable array of
AND and OR terms.
 A PLA typically has a large number of inputs and outputs
and can be used to implement equations that are
impractical for a ROM (because of the number of inputs
required).
 Generally the product terms limit the application of a
PLA. Use minimization techniques to reduce the number
of product terms in an implementation if it is to fit in a
PLA.
 T h e p rogram for a PL A is very sim ilar to th e
con n ection array for a m u ltip le ou tp u t B oolean
fu n ction , su ch as th at gen erated b y C A FE .
SYEN 3330 Digital Systems
Chapter 4-2
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PLA Implementation
 F or th e P A L
im p lem en tation , w e
also u se th e
m in im ized eq u ation s:
 IN T (1) = w + x
IN T (0) = x'y+ x'z+ w x
 T ry you r h an d at
p rogram m in g it!
SYEN 3330 Digital Systems
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PLA Implementation (Continued)
 H ere is an
im p lem en tation :
IN T (1) = w + x
IN T (0) = x'y+ x'z+ w x
 Is it correct?
w
SYEN 3330 Digital Systems
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Summary of Programmable Logic

C h a ra cteristics
 D ev ice
 D ev ice U ses 
T yp e
ROM
PAL
PLA
Type
ROM
PAL
PLA
AND terms
2N Fixed terms
Programmable
Programmable
OR terms
Programmable
Fixed
Programmable
U ses
S in gle level, S O P , m u ltip le ou tp u t fu n ction s.
D irectly im p lem en ts fu n ction tab les.
T w o or m ore level S O P im p lem en tation s w ith
ou tp u t p olarity ad ju st. C an 't im p lem en t all
fu n ction s d u e to lim ited O R term s.
T w o or m ore level S O P . L im ited A N D an d O R
term s can lim it ap p licab ility.
SYEN 3330 Digital Systems
Chapter 4-2
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ROM, PAL, PLA Examples
 R E C A L L : S q u are R oot of a N u m b er (IN T )
INT(0)
y
1
1
INT(1)
y
1
1
1
1
1
x
1
w
1
1
 Im p lem en tation s
D evice
L ogic
MUX
D ecod er
1
RND
RND(0)
Y es
Y es (3)1
Y es (2)
SYEN 3330 Digital Systems
1
x
1
1
w
1
1
1
1
1
1
1
1
1
z
z
IN T
IN T (1) = w + x
y
IN T (0) = x'y+ x'z+ w x
y
RND(1)
Y es
1
Y es (2)
Y
1 es(2)
1
1
x
1
1
Chapter 4-2
1
1
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x
ROM, PAL, PLA Implementations
D evice
RND
IN T
ROM
PA L
16x2
M ayb e
N ote 1
Y es
16x3
Y es
PLA
Y es
N ote 1: " O R " term s m igh t
lim it ap p lication .
SYEN 3330 Digital Systems
Fu n ction T ab le
(for referen ce)
N UM
IN T
N UM
IN T
0000
00
1000
10
0001
01
1001
11
0010
01
1010
11
0011
01
1011
11
0100
10
1100
11
0101
10
1101
11
0110
10
1110
11
0111
10
1111
11
Chapter 4-2
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ROM Implementation
 T h is im p lem en ta tio n
is triv ia l -- th e
fu n ctio n ta b le serv es
a s th e fu se m a p . A
1 6 w o rd b y 2 b it p ro m
is n eed ed (w e w ill u se
a 16x4 PR O M as
sh o w n ):
 T ry p rogram m in g it
you rself first.
SYEN 3330 Digital Systems
Chapter 4-2
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ROM Implementation (Continued)
 H ere is th e so lu tio n
(ch eck it a g a in s th e
fu n ctio n ta b le). (D O T
m ea n s a co n n ectio n
ex ists).
N UM
IN T
N UM
IN T
0000
00
1000
10
0001
01
1001
11
0010
01
1010
11
0011
01
1011
11
0100
10
1100
11
0101
10
1101
11
0110
10
1110
11
0111
10
1111
SYEN 3330 Digital Systems
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PAL Implementation
 F or th e P A L
w
im p lem en tation , w e
go b ack to th e
m in im ized eq u ation s:
INT(0)
x
IN T (1) = w + x
IN T (0) = x'y+ x'z+ w x
"0"
INT(1)
 T ry y o u r h a n d a t
y
p ro g ra m m in g it!
"0"
Out3
"0"
z
SYEN 3330 Digital Systems
Chapter 4-2
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PAL Implementation (Continued)
 H ere's an
w
im p lem en tation :
IN T (1) = w + x
IN T (0) =
x'y+ x'z+ w x
INT(0)
x
"0"
INT(1)
 Is it correct?
y
"0"
Out3
"0"
z
SYEN 3330 Digital Systems
Chapter 4-2
Page 22
PLA Implementation
 F or th e P A L
im p lem en tation , w e
also u se th e
m in im ized eq u ation s:
 IN T (1) = w + x
IN T (0) = x'y+ x'z+ w x
 T ry you r h an d at
p rogram m in g it!
SYEN 3330 Digital Systems
w
x
y
z
I1
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I0
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PLA Implementation (Continued)
 H ere is an
im p lem en tation :
IN T (1) = w + x
IN T (0) = x'y+ x'z+ w x
 Is it correct?
w
SYEN 3330 Digital Systems
x
y
z
I1
Chapter 4-2
I0
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