Lecture 19
Chapter 11. Instruction Sets:
Addressing Modes and Formats (Cont.)
Addressing Modes
1. Immediate
2. Direct
3. Indirect
4. Register
5. Register Indirect
6. Displacement
7. Stack
5. Register Indirect Addressing
• c.f. Indirect addressing.
• EA = (R)
• Operand is in memory location pointed to by
contents of register R.
• Large address space (2n).
• One fewer memory access
than indirect addressing.
6. Displacement Addressing
• EA = A + (R)
• Address field holds two values: A = base value,
R = register that holds displacement, or vice versa.
6. Displacement Addressing – Interpretations
• Relative Addressing
— R = Program counter, PC
— EA = A + (PC)
— i.e. get operand from A locations from current location
pointed to by PC. A is in 2’s comp. representation.
— c.f. Locality of reference & cache usage.
• Base-Register Addressing
— R holds a base address.
— A holds displacement from base address.
— R may be explicit or implicit (e.g. segment registers in
80x86).
• Indexed Addressing
— A is a memory address
— R holds displacement (index register).
— EA = A + (R).
— Good for accessing arrays
– EA = A + (R)
– R++
6. Displacement Addressing – Autoindexing
• Typically, there is a need to increment/decrement
the index register after each reference to it.
• EA = A + (R)
(R) ← (R) + 1
• If certain registers are devoted exclusively to
indexing  autoindexing is done automatically.
• Sometimes both indexing and indirection are
provided.
• Preindexing: indexing is done before the
indirection.
—EA = (A+(R))
(multiway branch table)
• Postindexing: indexing is done after the indirection.
—EA = (A) + (R)
(accessing fixed-length blocks)
7. Stack Addressing
• Operand is (implicitly) on top of stack.
• e.g.
—ADD
Pop top two items from stack
and add
Addressing Modes – Summary
Pentium Addressing Modes
• Virtual or effective address is offset into segment.
—Starting address plus offset gives linear address.
—This goes through page translation if paging enabled.
• Addressing modes available
—Immediate
—Register operand
—Displacement
—Base
—Base with displacement
—Scaled index with displacement: scaling  different word
sizes.
—Base with index and displacement: 2D arrays, array in SF
—Base scaled index with displacement: different word sizes
—Relative
Pentium
Address
Calculation
General-purpose register
Pentium Addressing Modes – Summary
PowerPC Addressing Modes – Summary
General-purpose register
PowerPC Addressing Modes
• Load/store architecture
— Indirect
– Instruction includes 16-bit displacement to be added to base
register.
– Can replace base register content with new address.
— Indirect indexed
– Instruction references base register and index register.
– EA is sum of contents.
• Branch addressing
— Absolute
– 24- and 16-bit immediate value for unconditional and cond.
– Extended to 32-bit value: add 2 0’s to LS end, sign-extend.
— Relative.
— Indirect.
• Arithmetic Instructions
— Operands in registers or part of instruction.
— Floating point is register only.
PowerPC Indirect and Indirect Indexed
Addressing Modes
Instruction Formats
• Layout of the bits of an instruction.
• Includes opcode and (implicit or explicit) zero or
more operands.
• Each operand is referenced using some
addressing mode.
• Usually more than one instruction format in an
instruction set.
Instruction Length
• Affected by and affects:
— Memory size.
— Memory organization.
— Bus structure.
— CPU complexity.
— CPU speed.
• More opcodes, operands, and addressing modes 
easier/flexible programming.
• Large range of addressable memory is desirable.
• Tradeoff between powerful instruction repertoire and saving
space.
• mem. transfer length = Inst. length (or multiple).
• CPU exectues instr. Faster than it can fetch them  use short
instructions.
• Multiple of char. Length and = length of fixed-point numbers.
Allocation of Bits (1)
• Tradeoff between # of opcodes & power or addressing.
• Variable-length opcodes (min. opcode length is
needed).
• Number of addressing modes
—Implicit: opcode  particular addressing mode.
—Explicit: some bits to specify addressing mode are
needed.
• Number of operands
—Fewer addresses  longer programs.
—Each operand could need its mode indicator, or just one.
• Register versus memory
—Accumulator  no bits, but longer program.
—More registers  used instead of mem.  less bits.
Allocation of Bits (2)
• Number of register sets
—e.g., a set for data and another set for displacement.
—2 sets of 8 registers  3 bits are needed, opcode
determines which set.
• Address range
—Direct addressing is rarely used.
—Displacement addressing: large displacement would
require more bits.
• Address granularity
—Byte addressing vs. word addressing.
—Byte addressing is convenient for characters, but needs
large number of bits.
Pentium Instruction Format
•
•
•
•
Inst. prefix: LOCK or repeat prefixes to repeat operations on strings. # in CX.
Segment override: which segment register to use.
Operand size override: specifies 16- or 32-bit operands.
Address size override: specifies 16- or 32-bit addresses  displacement size.
PowerPC Instruction Format (1)
PowerPC Instruction Format (2)
Reading Material
• Stallings Chapter 11, pages 386-397, 404-408