HARDWARE / SOFTWARE
PARTITIONING
Devang Sachdev
Lizheng Zhang
1
HW
Motivation

Hardware – Software Codesign (HSC)
–
–
–
–

SW
Most efficient implementation of a system
Unified H-S integration
Higher confidence in the systems functionality
Lower costs and smaller development cycles
Hardware – Software Partitioning
– Definition: The process of deciding, for each subsystem,
whether the required functionality is more advantageously
implemented in hardware or software
– Fundamental phase of HSC
ECE 734 Project Presentation
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HW
Basics


SW
Goal: To achieve a partition that will give us the
required performance within the overall system
requirements (in performance, area, power, cost etc.)
Approach
– Software – oriented partitioning: Start with all functionality
in software and move portions into hardware which are
time-critical and can not be allocated to software
– Hardware – oriented partitioning: Start with all functionality
in hardware and move portions into software
implementation
ECE 734 Project Presentation
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HW
Design Methodology
SW
Functional verification
MATLAB
C language
C + VHDL
VHDL
HW
SW
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HW
Target Architecture
FPGA
Shared
Memory
Processor
SW
Global
Memory
Local
Memory
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Test Application

HW
SW
Discrete Cosine Transform (DCT)
– Computationally intensive block in JPEG
– Equation
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Design Issue – Truncation Error

HW
SW
Decide bits needed to represent data
– Cosine coefficients
• [-0.5,+0.5]
• s.xxxxx00000000
– Data path length
• [-4096,+4095]
• sxxx_xxxx_xxxx0.00000

JPEG files compression
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HW
Cosine Coefficients
SW
1
2
3
4
5
6
7
8
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HW
Computation Data Length
SW
14
13
12
11
10
9
8
7
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DCT Partitioning
HW
SW
for v=1:8
for u=1:8
sum2(u,v)=0;
for n=1:8
sum1(n,u) = 0;
for m=1:8
x1 = f(m,n)*dctcos(m,u);
sum1(n,u)= sum1(n,u)+ x1;
end
y1 = sum1(n,u)*dctcos(n,v);
sum2(u,v)= sum2(u,v)+y1;
end
end
end
ECE 734 Project Presentation
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HW
SW
Thank You
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