Operating Modes
UQ: State and explain the operating modes of
X86 family of processors. Show the mode transition diagram highlighting important features.(10 Marks)

Operating Modes
• The Intel 386DX has two modes of operation
– Real Mode (Real Address) and
– Protected Mode (Protected Virtual Address Mode)
• Real Mode:
– It works as a very fast 8086 with 32-bit extensions.
– It is required to set up the processor for protected mode
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Operating Modes
• Protected Mode:
– It provides access to sophisticated memory management, paging and privilege capabilities of the processor
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• It has same base architecture as 8086
• When a processor is reset, it is initialized in real mode.
• It sets up the processor for Protected Mode.
• The segment size of 80386 in real mode is
64KB
• The maximum memory size is 1MB
• Only address lines A2-A19 are active
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• Paging is not allowed in real mode and hence the physical address is same as linear.
• Physical Address is formed by adding contents of segment register shifted left by 4 bits to an effective address.
• This results in a physical address from
00000000 to 0010FFEF (FFFF0+FFFF)
• Real mode segments always start on 16-byte boundaries since they are left shifted.
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• All segments in Real Mode are exactly 64KB
long and generate exception 13 if a data operand or instruction fetch occurs past the end of a segment.
• Segments may be overlapped in Real Mode.If a particular segment does not use all 64KB another segment can be overlayed on top of the unused portion of the previous segment.
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UQs :
Draw protected mode address translation mechanism of 80386 and explain segment translation in detail.(2)
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• It increases linear address space to 4GB and virtual address space to 64TB
• This mode uses two components to form the logical address:
– 16 bit selector: to determine the linear base address of the segment
– 32 bit offset: Added to base address to form the linear address
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Protected Mode: Addressing Mechanism
• In this mode, the selector is used to specify an index to the operating system defined table
• The table contains the 32-bit base address of a given segment.
• The linear address is formed by adding base address to the offset
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Protected Mode: Addressing Mechanism
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Protected Mode: Addressing Mechanism
• Paging provides a means of managing very large segments.
• It translates linear address into physical address.
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Protected Mode: Addressing Mechanism
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• Segmentation provides the basis of protection which encapsulates regions of memory which have common attributes.
• All information about a segment is stored in an 8-byte data structure called a descriptor.
• All descriptors are contained in tables recognized by hardware.
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• A selector in protected mode has 3 fields:
– TI (Table Indicator): Local or Global Descriptor
Table Indicator
– Index(Descriptor Entry Index ): Selects one of 8K descriptors
– RPL (Requestor Privilege Level): allows testing of selector’s privilege attributes
• Level 0: Most Privilege Level
• Level 3: Least Privilege Level
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• It defines all the segments used in x86 system
• There are 3 types of table:
– Global Descriptor Table(GDT)
– Local Descriptor Table(LDT)
– Interrupt Descriptor Table(IDT)
• All tables are variable length memory arrays
• They can range in size from 8 bytes to 64KB
(2 13 x 2 3 ) (3 bits are implied as descriptor size is fixed)
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• Each table can hold up to 8192(2 13 ) 8-byte descriptors.
• The table has registers associated with them named GDTR, LDTR and IDTR which hold the
32-bit linear base address and 16-bit limit of each table.
• These tables are manipulated by the OS using privileged instructions.
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• It contains descriptors which are possibly available to all of the tasks in a system.
• Every Intel386 DX system contains a GDT.
• It contains code and data segments used by the operating systems and task state
segments and descriptors for the LDTs in a system.
• The first slot of GDT corresponds to the null selector and is not used.
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