EE3230 積體電路設計導論
Introduction to Integrated Circuits Design
Class Information
Fall, 2014
Prof. Meng-Fan Chang (張孟凡)
Department of Electrical Engineering
National Tsing Hua University (NTHU), Taiwan
Course Contents
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“Introduction” to integrated circuits
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CMOS devices, manufacturing technology, logic gates and
building blocks.
Course goals
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Ability to design and optimize CMOS circuits with different
constraints: size (cost), speed and power dissipation
Learn various IC-design CAD tools
- Circuit-simulation: HSPICE
- IC-Layout: Laker
- Verification (DRC, LVS) & RC-Extraction : Calibre
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Course prerequisites
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VLSI_intro
Electronics, Logic Designs, ( and Analog Circuit Designs)
Prof. Meng-Fan Chang
EE Dept., NTHU, Taiwan
Chapter 1 – Intro. # 2
Course Administration
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Instructor: Prof. Marvin Meng-Fan Chang (張孟凡)
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Office Hours: Thursdays 14:10– 14:40 AM or by appointment
Office: Delta Building (台達館861);
Email: mfchang@ee.nthu.edu.tw
助教 (TA):
賴乙婷, 洪睿渝, 林建呈, 林鉦峻, 李岳陞, 林文章, 羅介甫
=> ss877511@hotmail.com
 TA office hours: TBD, at 台達館826
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Course web:
http://larc.ee.nthu.edu.tw/~nthu_mfchang/Courses/EE3230/VLSI.htm
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Labs
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Room: EECS Workstation Room
Evening Hours: Thursdays 18:30~20:30 (不點名)
Day-time Hours:
- Oct. 30, Nov. 20, 13:10~14:00 (class-time)
VLSI_intro
Prof. Meng-Fan Chang
EE Dept., NTHU, Taiwan
Chapter 1 – Intro. # 3
Course Administration - II
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Text Book:
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References:
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“Digital Integrated Circuits: A Design Perspective” by Rabaey
“Neil H. E. Weste and David Harris, CMOS VLSI Design: A
Circuits and Systems Perspective, 3nd Ed., Addison Wesley,
2005”, by Ashok K. Sharma
IEEE papers
Slides:
 pdf on the course web page after lectures
VLSI_intro
Prof. Meng-Fan Chang
EE Dept., NTHU, Taiwan
Chapter 1 – Intro. # 4
Grade Policy
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Midterm-1 exam.: 20%
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Midterm-2 exam. : 20%
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Oct. 27, 2014
Dec. 1, 2014
Final exam. (x1): 15%
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Jan. 12, 2014
Project (x1): 20%
 Homework (x5): 25%
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2 students per team
- Each student should present his/her HW separately
- One student present the project for each team
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Homework Out/In: Mondays (1:20pm)
- Late HW policy: 0~1 week: 50%, >1weeks:0%
VLSI_intro
Prof. Meng-Fan Chang
EE Dept., NTHU, Taiwan
Chapter 1 – Intro. # 5
Class Schedule
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No lectures on Sept. 22, Sept. 25, Oct. 30 and Nov. 20
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Make-up classes: (5x50=250min.)
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as Lab hours : Oct. 30 & Nov. 20
Each class start from 13:10 (10min earlier)
15 weeks x 10 min x 2 = 300 min.
如有臨時停課 – make up classes on Tuesday evenings
VLSI_intro
Prof. Meng-Fan Chang
EE Dept., NTHU, Taiwan
Chapter 1 – Intro. # 6
IC Design Courses in NTHU_EE - II
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大三/大四
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積體電路設計導論
積體電路設計實習 (IC Lab)
類比電路分析與設計 1 & 2
積體電路設計自動化概論
生醫積體電路設計導論
Memory
SRAM
Flash
BIST &
Test
RF
DRAM
Analog
Digital
VLSI_intro
BB
研究所
超大型積體電路設計
 超大型機體電路數訊號處理
 計算機算數
 系統晶片實體設計
 系統晶片設計實驗
 超大型積體電路測試
 半導體記憶體測試
 類比電路設計
 有線通訊積體電路設計
 混合式無線通訊積體電路設計
 射頻積體電路設計
 通訊系統晶片設計
 內嵌式記憶體電路設計
 先進記憶體電路設計
Prof. Meng-Fan Chang
Chapter 1 – Intro. # 7
EE Dept., NTHU, Taiwan
 Others
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課程內容
Introductions
 CMOS Devices and IC Process
 Static and Dynamic CMOS Gates (Combination Logics)
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Interconnects and Parasitic Effects
 Sequential CMOS Circuits
 Memories and Emerging Technologies
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IC Design Methodologies
 Low-Power Design Methodology
 Design Issues in Nano-scale IC
 Design for Test
 3D-IC
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VLSI_intro
Prof. Meng-Fan Chang
EE Dept., NTHU, Taiwan
Chapter 1 – Intro. # 8