ELC 2060
Electronic Circuits
Lecture 1: Current Mirrors
Department of Electronics and Electrical
Communications Engineering
Cairo University
Course Outline
▪
BIASING AND CURRENT MIRRORS
▪
FEEDBACK
▪
OSCILLATORS
▪
NOISE ANALYSIS
▪
POWER AMPLIFIERS
▪
OP-AMP APPLICATIONS
Cairo Univ.
ELC2060: Analog Electronics
2
Course Mark Distribution & References
▪
3 QUIZZES …………………… 15 MARKS
▪
MIDTERM …………………….. 20 MARKS
▪
PROJECT ……………………… 15 MARKS
▪
LAB …………………………… 30 MARKS
▪
FINAL …………………………. 70 MARKS
▪
TOTAL ………………………... 150 MARKS
References:
Fundamentals of Microelectronics (Razavi)
Microelectronics circuits (Sedra/Smith)
Design of Analog CMOS Integrated Circuits (Behzad Razavi)
Lecture Notes
Cairo Univ.
ELC2060: Analog Electronics
3
Current Sources Concept
All Analog circuits require either bias voltage or bias current or both.
VDD
Ibias
Voltage Bias:
Vout
Accurate, Constant, and independent of Process, Voltage or Temp (PVT)
Bandgap circuits
Vbias
Vin
Current Bias (or Current Source):
1. Accurate
Ibias
2. High output impedance (constant Ibias across Vout changes)
3. Operate at low values of (Vout ~ 0)
Is
Rout Vout
Minimum allowed Vout is called Vcomp (compliance voltage)
4. Independent of Process, Voltage or Temp (PVT)
Cairo Univ.
ELC2060: Analog Electronics
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Current Sources Concept




The gain and many other properties of amplifiers
relay on their bias currents
How can we obtain a current that is insensitive to
PVT variations?
A MOS biased in Saturation can act as a current
source
Biasing with a simple divider from the supply makes
the current sensitive to PVT variations
T,P
I out
Cairo Univ.
ELC2060: Analog Electronics
V
T,P

K
R2

= VDD
− VTH 
2
R1 + R2

5
2
Current Mirrors
•
An accurate voltage source (Bandgap) can be used to generate an accurate current source
•
A typical analog circuit requires too many current sources
•
Can not do this for all current sources, thus Current mirrors concept appears
VDD
Ibias1
VDD
Ibias3
VDD
Ibiasn
Accurate
Current
source
Analog Circuit
(GOLDEN
CURRENT)
Ibias2
Ibias4
Ibiasm
• Same requirements on current sources apply on current mirrors
• Accurate mirroring is one more requirement
Cairo Univ.
ELC2060: Analog Electronics
6
Basic BJT Current Mirror
For proper operation:
- Qref and Q1 are in active region
→ I is only dependent on area and Vbe
I C = I S exp
Vbe
VT
- Qref and Q1 are matched → βref = β1 and IS-ref = IS-1
𝑉𝑏𝑒,𝑟𝑒𝑓 = 𝑉𝑏𝑒,1 → 𝐼𝑐,𝑟𝑒𝑓 = 𝐼𝑐1, 𝐼𝐵,𝑟𝑒𝑓 = 𝐼𝐵1
2
𝐼𝑟𝑒𝑓 = 𝐼𝑐𝑟𝑒𝑓 + 2𝐼𝐵 = 𝐼𝑐𝑟𝑒𝑓 1 +
𝛽
𝐼𝑟𝑒𝑓
𝐼𝑜𝑢𝑡 = 𝐼𝑐1 = 𝐼𝑐𝑟𝑒𝑓 =
≈ 𝐼𝑟𝑒𝑓
2
1+
𝛽
𝑉𝑐𝑐 − 0.7
𝐼𝑟𝑒𝑓 ≈
𝑅
Error =
Cairo Univ.
𝐼𝑜𝑢𝑡 −𝐼𝑟𝑒𝑓
𝐼𝑟𝑒𝑓
2
2
What is Rout? (ro)
What is Vcomp ? (VCE,sat)
2
= 𝛽/ 1+𝛽  𝛽
ELC2060: Analog Electronics
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Basic BJT Current Mirror
VCC
Doubling the transistor area leads to
Iout=2Iref
Iref
doubling IS and thus doubling the
current
I C = I S exp
Vbe
VT
R
Qref
Q1
Double
area
Widlar Current Mirror
𝐼𝐶𝑟𝑒𝑓 ≈ 𝐼𝑟𝑒𝑓 (assuming =)
VCC
Iout
Iref
𝑉𝐵𝐸𝑟𝑒𝑓 = 𝑉𝐵𝐸1 + 𝐼𝐸1 𝑅𝑒
𝑉𝑇 ln
𝐼𝐶𝑟𝑒𝑓
𝐼𝑆𝑟𝑒𝑓
= 𝑉𝑇 ln
𝐼𝐶1
𝐼𝑆1
+ 𝐼𝐸1 𝑅𝑒
(Q1 & Qref are matched)
Qref
𝑉𝑐𝑐 − 0.7
𝑅
Cairo Univ.
Q1
Re
𝐼𝐶𝑟𝑒𝑓
𝑉𝑇 ln
= 𝐼𝐸1 𝑅𝑒
𝐼𝐶1
𝐼𝑟𝑒𝑓 ≈
R
Calculate Vcomp and Rout
ELC2060: Analog Electronics
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Accurate BJT Current Mirror: “βeta Helper”
To get rid of β effect:
VCC
• We know IC is the same because of common VBE
and matched transistors
Iref
• But we need to copy Iref not IC
(1)
𝑉𝑏𝑒,𝑟𝑒𝑓 = 𝑉𝑏𝑒,1 → 𝐼𝑐,𝑟𝑒𝑓 = 𝐼𝑐1 , 𝐼𝐵,𝑟𝑒𝑓 = 𝐼𝐵1
VCC
Iout
2Ic/
(β(β+1))
Ic
2Ic/β
Qref
KCL at node (1):
I ref =
R
Q1
Ic/β
Ic/β


2 IC
2
+ I C = I C 1 +

 (  + 1)

(

+
1
)




2
I out = I C = I ref / 1 +
  I ref

(

+
1
)



2 
/ 1 + 2 
  
Vcomp and Rout are still the same
Error =
𝐼𝑜𝑢𝑡 −𝐼𝑟𝑒𝑓
𝐼𝑟𝑒𝑓
2
2
2
= 𝛽2 / 1 + 𝛽2  𝛽2
• The error term is proportional to (1/β2) rather than (1/β)
Cairo Univ.
ELC2060: Analog Electronics
9
Basic MOS Current Mirror
VDD
For proper operation:
Iout
- M1 and M2 are in Saturation region
→ I is only dependent on W/L and VGS
I DS =
nCOX w
2
L
(VGS − Vth )2
R
What is Rout?
What is Vcomp ?
Iref
M1
M2
- M1 and M2 are matched → μn1COX1 = μn2COX2 and Vth1 = Vth2
Mirroring:
- Since VGS is the same,
I out
=
I ref
(w L )2
(w L )1
Robust to process variations?
- To reduce the effect of channel length modulation current mirrors use large L
VDD − VGS
R
 C  w
2
= n OX   (VGS − Vth )
2  L 1
I ref =
I ref
Cairo Univ.
ELC2060: Analog Electronics
10
High performance MOS Current Mirrors
Cascode current mirrors (assume all transistors are in SAT):
𝐾
𝐼𝐷𝑆 =
𝑉𝐺𝑆 − 𝑉𝑡ℎ 2
2
𝐼
𝐼𝐷𝑆1
𝐼𝑜𝑢𝑡
𝑊 Τ𝐿 ȁ 2
𝑉𝐺𝑆2 = 𝑉𝐺𝑆1 → 𝑊𝐷𝑆2
=
→
=
Τ𝐿 ȁ
𝑊 Τ𝐿 ȁ
𝐼
𝑊 Τ𝐿 ȁ
2
•
𝐼𝐷𝑆3
𝑊 Τ𝐿 ȁ 3
1
𝑟𝑒𝑓
1
Assume M3 & M4 have the same current density, i.e :
VDD
R
M3
Iout
Vb
Iref
𝐼
= 𝑊𝐷𝑆4
→ 𝑉𝐺𝑆4 = 𝑉𝐺𝑆3
Τ𝐿 ȁ
M1
4
M4
+
M2 𝑉𝐷𝑆2
−
𝑉𝑏 = 𝑉𝐺𝑆1 + 𝑉𝐺𝑆3 → 𝑉𝐷𝑆2 = 𝑉𝑏 − 𝑉𝐺𝑆4 = 𝑉𝐺𝑆1
For M1 & M2:
𝑉𝐺𝑆1 =𝑉𝐺𝑆2 & 𝑉𝐷𝑆1=𝑉𝐷𝑆2 → Accurate mirroring regardless of channel
length modulation
At Compliance:
• M2 is always in SAT since VDS1=VGS1
• To maintain M4 is SAT:
𝑉𝐷4,𝑚𝑖𝑛 = 𝑉𝑐𝑜𝑚𝑝 = 𝑉𝐺4 −𝑉𝑇𝐻 = 𝑉𝑏 − 𝑉𝑇𝐻
𝑉𝑐𝑜𝑚𝑝 = 𝑉𝐺𝑆1 + 𝑉𝐺𝑆3 −𝑉𝑇𝐻
Cairo Univ.
Improved Rout
Improved Accuracy: insensitive to 
Vcomp degraded
Routro2+ro4+gm4ro4ro2
ELC2060: Analog Electronics
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High performance MOS Current Mirrors
“Low voltage” Cascode current mirrors (assume all transistors are in SAT):
𝐾
VDD
𝐼𝐷𝑆 =
𝑉𝐺𝑆 − 𝑉𝑡ℎ 2
2
𝐼
𝐼𝐷𝑆1
𝑉𝐺𝑆2 = 𝑉𝐺𝑆1 → 𝑊𝐷𝑆2
=
R
Τ𝐿 ȁ
V
𝑊 Τ𝐿 ȁ
𝐼𝑜𝑢𝑡
𝑊 Τ𝐿 ȁ
= Τ ȁ2
𝐼𝑟𝑒𝑓
𝑊 𝐿1
2
1
b
Iref
Iout
M3
+
For accurate mirroring: 𝑉𝐺𝑆1 =𝑉𝐺𝑆2 & 𝑉𝐷𝑆1=𝑉𝐷𝑆2
M1
M2
𝑉𝐷𝑆1 =𝑉𝐺𝑆1
𝑉𝐷𝑆2
−
𝑉𝐷𝑆2 = 𝑉𝑏 − 𝑉𝐺𝑆3 = 𝑉𝐺𝑆1
Improved Rout
𝑉𝑏 = 𝑉𝐺𝑆3 + 𝑉𝐺𝑆1
If 𝑉𝑏 < 𝑉𝐺𝑆3 + 𝑉𝐺𝑆1 M2 will still be in SAT as long as:
𝑉𝑏𝑚𝑖𝑛 = 𝑉𝐺𝑆3 + 𝑉𝐷𝑆,𝑆𝐴𝑇1 = 𝑉𝐺𝑆3 +𝑉𝐺𝑆1 −𝑉𝑇𝐻
High Accuracy
Vcomp degraded
At Compliance ( condition is M3 remains in SAT):
𝑉𝑐𝑜𝑚𝑝,𝑚𝑖𝑛 = 𝑉𝑏𝑚𝑖𝑛 −𝑉𝑇𝐻 = 𝑉𝐺𝑆3 +𝑉𝐺𝑆1 −2𝑉𝑇𝐻
Cairo Univ.
ELC2060: Analog Electronics
Routro2+ro3+gm3ro3ro2
12
Reference Current Generation Circuit
PMOS
current mirror
I




Combine the BG voltage with a resistor to obtain the current reference
The feedback generates the necessary gate voltage for the drain to track
Vref ensuring I=Vref/R
This current can be mirrored with any desired scaling factor (M)
If a true constant current across PVT is necessary, and off-chip high
precision resistor can be used
Cairo Univ.
ELC2060: Analog Electronics
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