Silicon Photonics at Intel 50Gbps Integrated Link

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Demonstration of a High Speed
4-Channel Integrated Silicon
Photonics WDM Link with Hybrid
Silicon Lasers
Andrew Alduino
I nt el Corporat ion, 2200 Mission
College Boulevard, Sant a Clara CA
95054
1
1
Outline
• Introduction
• Previous Results
• WDM Silicon Photonics
Link
• Link Testing Results
• Summary
2
Previous Silicon Photonics Results
Lasers
1st Continuous Wave
Silicon Raman Laser
(Feb. ‘05)
Data Encoders
Light detectors
Silicon Modulators
40 Gbps PIN
Photodetectors
1GHz ( Feb ‘04)
10 Gbps (Apr ‘05)
40 Gbps (July ’07)
(Aug. ’07)
Basic Light Routing
Hybrid Silicon
Laser (Sept. ‘06)
3
Waveguides, multiplexers,
demultiplexers, couplers…
340 GHz Gain*BW
Avalanche Photodetector (Dec ’08)
Integration Vision
ECL
Modulator
Multiple
Channels
Filter
Drive rs
CMOS
Circuitry
DEMUX
TIA
Passive
Alignment
TIA
Photodetector
FUTURE
M onolit hic?
MUX
4
Le ve l of int e gr a t ion
D e t e r m ine d by
Applica t ion/ cost
Outline
• Introduction
• Previous Results
• WDM Silicon Photonics
Link
• Link Testing Results
• Summary
5
High Speed Silicon Modulator
input
1x2 MMI
2x1 MMI
output
pn phase shifters
Metal contact
Si modulator on PCB
Phase shifter
waveguide
SEM picture of p-n phase shifter
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• Reversed biased pn diode based
devices
• Travelling wave electrode designs
• Mach-Zhender configuration
• Stable over temperature and
wavelength
40Gbps Data Transmission
Optical Roll-off
Normalized Modulator Output (dB)
1
0
-1
-2
-3
-4
~30 GHz roll-off
-5
-6
-7
-8
0
1
10
Frequency (GHz)
40Gbps Data Transmission
“Eye” diagram from large signal,
psuedo-random bit sequence
(prbs) testing
7
Small Signal Testing
Optical 3 dB roll off ~30 GHz
L. Liao, A. Liu, D. Rubin, J. Basak, Y. Chet rit , H. Nguyen, R. Cohen, N. I zhaky, and M. Paniccia, “ 40 Gbit / s
silicon opt ical m odulat or for high- speed applicat ions,” Elect ron. Let t . Vol. 43, No. 22, 25 t h Oct ober 2007.
100
SiGe Waveguide Photodetector Design
Top View
N-Ge
i- Ge
SEM Cross- Sect ion
• Photodetector concepts rely upon the
epitaxial growth of Ge on SOI substrate
• Ge absorption scales to ~1600nm
SEM Cross- Sect ion
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SiGe WG PIN - High Speed Performance
31 GHz Opt ical Bandwidt h
40 Gbps Eye Diagram
95% Quantum Efficiency
Operating at λ ~1.56um
< 200nA of dark current
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“ 31 GHz Ge n- i- p waveguide phot odet ect ors on Silicon- on- I nsulat or subst rat e” ; Tao Yin, Ram i
Cohen, Mike M. Morse, Gadi Sarid, Yoel Chet rit , Doron Rubin, and Mario J. Paniccia Opt ics Express,
Vol. 15, I ssue 21, pp. 13965- 13971
Hybrid Silicon Laser
(Developed with UCSB)
Creating a Silicon-based laser by bonding a
III-V material (Indium Phosphide) onto Silicon
SEM of Cross Section
InP bonded to Si
Cross Section of Hybrid Laser
InP emits light when electrically stimulated
Light bounces back and forth in silicon, and is
amplified by the InP based material
Mirrors are gratings etched into the silicon
Grating pitch defines the laser wavelength
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One bond, no alignment needed
Single Wavelength Hybrid Laser
• Photolithographically
defined grating mirrors
fabricated in silicon.
• Creating low cost, HVM
compatible wavelengthspecific laser channels
Typical Device
~ 1000µm
~ 150µm
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Outline
• Introduction
• Previous Results
• WDM Silicon Photonics
Link
• Link Testing Results
• Summary
12
Integrated 4 Channel CWDM Silicon
Photonics Architecture
• Silicon Hybrid Laser and Transm it t er com ponent s int egrat ed on one
silicon die
• Receiver com ponent s int egrat ed ont o a separat e silicon die
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Integrated Transmitter Chip
1101001110
Integrates Hybrid Silicon Lasers
With Modulators for data
encoding and a Multiplexer to
put 4 optical channels onto 1
fiber
Electrical data in…
Up to 12.5 Gbps/channel
Alignment Pin
Connector
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50Gbps
out on one
optical fiber
Integrated Receiver Chip
Integrates a coupler to receive
incoming light with a demultiplexer to
split optical signals and Ge-on-Si
photodetectors to convert photons to
electrons
Electrical data out…
Up to12.5 Gbps
per channel
Alignment Pin
1101001110
Coupler
1101001110
1101001110
50Gbps
in on one
optical fiber
1101001110
Connector
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4λx10Gbps SiP Tx & Rx Packages
Receiver Package
I nt egrat ed
4λx10G SiP
Tx Die
Passive
Opt ical
Connect or
I nt egrat ed
4λx10G
SiGe PD Rx
Die
Driver I C
Socket able
Edge
Connect or
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Receiver ( TI A) I C
Transm it t er Package
Receiver and Transm it t er
packages enable bot h
separable ( passive) opt ical
and elect rical connect ors
End to End System Test Setup
Fiber
Support s
Quadrat ure &
Laser bias
circuit ry Cont rol
Receiver Test Board
No lat ching
m echanism used
Driver I C
cont rol
int erface
Receiver Package
Transm it t er
Heat Sink
Air cooled
Edge
Connect or
Socket
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Edge
Connect or
Transm it t er Test Board
Outline
• Introduction
• Previous Results
• WDM Silicon Photonics
Link
• Link Testing Results
• Summary
18
Integrated Transmitter Optical Eye Diagrams
1291nm
1331nm
Perform ance
param et ers
• Ext inct ion Rat io =
4.4- 6.3dB
• Rise/ Fall Tim e =
41- 44ps
1311nm
1351nm
• Tot al Jit t er = 2334ps
•
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CW Silicon Hybrid
Laser die out put
power from 2m W t o
9m W
Wavelength Channel Alignment
• CWDM Channels were
chosen – 20nm spacing
( 1291nm , 1311nm ,
1331nm & 1351nm
• No t em perat ure t uning
or st abilizat ion was used
• Alignm ent of laser,
m ult iplexer and
dem ult iplexer channels
are ~ 1nm
• Est im at ed λ m ism at ch
loss < 0.3dB
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40Gbps (4λx10Gbps) Link Performance
1291nm
1331nm
• Out put
elect rical eye
diagram s
• Travelling
wave silicon MZ
m odulat or
1311nm
1351nm
• I nt el designed
driver I C, wit h
1.35V across
m odulat or
• ER from 4.4dB
t o 6.3dB
• Rise/ Fall Tim e
= 41- 44ps
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10Gbps Link Margin
Rx module optical
loss = 7.8 dB
1331nm
( 0.5dBm rec’d)
Link Margin = 6.7dB for BER of 10-12
Jit t er Measurem ent s
• Link Tot al Jit t er
• Random Jit t er
• Det erm inist ic Jit t er
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~ 43ps
~ 1.6ps
~ 21ps
50Gbps (4λx12.5Gbps) Link Performance
• Devices were
“ overclocked” t o
12.5Gbps
• Eyes rem ained
open, link
rem ained st able
1291nm
1331nm
• Ch1- 3 BER
< 10 - 12 , Ch4
~ 3x10 - 10
• ER from 3.4dB
t o 5.6dB
1311nm
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1351nm
• Rise/ Fall Tim e
= 38- 42ps
Outline
• Introduction
• Previous Results
• WDM Silicon Photonics
Link
• Link Testing Results
• Summary
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The Path to Tera-scale Data Rates
Today: 12.5 Gbps x 4λ = 50Gbps
25 Gbps x 4λ = 100Gbps
Scale UP
Scale OUT
12.5 Gbps x 8λ = 100Gbps
Spe e d W idt h
12.5
x4
12.5
x8
25
x16
40
x25
40G, 100G…
Ra t e
50G
100G
400G
1T
Future
Terabit+ Links
x16, x32…
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Could enable cost-effective high speed
I/O for data-intensive applications
Challenges: Optical Integration with CPU
Monolit hic
I nt egrat ion?
Package t opside
Connect ion?
PROCESSOR
ORGANIC PACKAGE
FIBERS
SOCKET
FR4 MOTHERBOARD
Board connect ion?
Challenges:
• Power: CPU’s operat e w it h Tem perat ures near ~ 85°C
• Packaging: Com pat ibilit y wit h exist ing HVM packages
• Test ing: Test ing co- packaged opt ical / elect rical CPU m odules
Mult iple approaches. Must balance perform ance, flexibilit y and
cost
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Data Center: Remote Optical Memory
Can increase design flexibilit y and drive down cost by
ext ending CPU- m em ory dist ance
CURRENT
FUTURE
Elect rical
Opt ical
Opt ical Link
Potential Advantages
• Higher capacity and higher
B/W at reduced system cost
• Distance flexibility as
memory can be further from
processor
• Board cost reduction due to
less complex routing
• Potentially overall power
reduction at system level
• Thermal & mechanical
challenges to co-package
with/next to CPU
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WDM Silicon Photonics Link Summary
• Demonstrated the first silicon hybrid laser and modulator WDM link
with all technologies required for system integration
• Demonstrated a 4 channel WDM system at 10Gbps – aggregate
bandwidth of 40Gbps
• Further demonstrated the link at 50Gbps with channels operating at
12.5Gbps
• Acknowledgements
•
Aurrion Ltd – For InP processing and hybrid laser developments
•
Micron (Numonyx) – For Silicon Photonics processing
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Thank You!
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To learn more,
Visit www.intel.com/pressroom
and www.intel.com/go/sp
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