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6.101 Spring 2015
Wires, Ground loops
Wires
Ground loops
Thermal considerations
Energy
PCB L
PCB Layout Lecture 14
1
Wires Theory vs Reality 30-50mv voltage drop in chip
power
supply
no se
noise
6.101 Spring 2015
Lecture 14
2
Signal Grounds
www.analog.com/library/analogdialogue/archives/43-09/edch%2012%20pc%20issues.pdf
6.101 Spring 2015
Lecture 14
3
Signal Grounds
www.analog.com/library/analogdialogue/archives/43-09/edch%2012%20pc%20issues.pdf
6.101 Spring 2015
Lecture 14
4
Power Line Connection
*Bill Whitlock,, Understanding,
g, Finding,
g, & Eliminating
g Ground Loops
p In Audio & Video Systems
y
6.101 Spring 2015
Lecture 14
5
AD Supply Voltages Consideration
Noise caused by current
spikes in fast switching
digital circuits:
ic  c
6.101 Spring 2015
Lecture 14
dv
dt
•
AVDD Positive Analog
Supply Voltage
•
AVSS Analog Ground
•
DVDD Positive Digital
Supply Voltage
•
DVSS Digital
g
Ground
6
Digital/Analog Grounds
DVdd
AVdd
digital
logic
LM 4550
analog
circ it
circuit
n signals
analog
circuit
+
Vin
-
digital
logic
analog ground
AVss
digital ground
DVss
Connect the grounds
at a single place
6.101 Spring 2015
Lecture 14
7
Noise ‐ Unavoidable
• Noise – generated: switching power supplies, high current output stage
li hi h
• Noise – picked up: 60 hz, broadcast signal; conducted: ground pickup, system clocks
d t d
d i k
t
l k
6.101 Spring 2015
Lecture 14
8
Junction (Silicon) Temperature
Si l S
Simple
Scenario
i
R li ti S
Realistic
Scenario
i
TJ
Silicon
TC
Case
S
Silicon
TS
Sink
Tj-Ta= RJA PD
RJA is the thermal resistance
between silicon and Ambient
TJ
PD
RJC
TJ
TC
RCS
RJA
PD
TA
TS
TA
RSA
Tj= Ta RJA PD
TA
RCA = RCS + RSA
Make this as low as possible
is minimized by facilitating heat transfer
(bolt case to extended metal surface – heat sink)
6.101 Spring 2015
Lecture 14
9
Heatsinks
Mounting screw insulated
from metal tab!
Insulators
*
*http://thompsona20armstronga4830a.wordpress.com/2011/11/21/heat-sink-mounting-kit-for-to-220-4880/
6.101 Spring 2015
Lecture 14
10
Thermal Grease
IImproves thermal
th
l
conductivity – less
is better
6.101 Spring 2015
Lecture 14
11
6.101 Spring 2015
Lecture 14
12
Problem: Energy Consumption
The Energy Problem
7.5 cm3
AA battery
Alkaline:
~10,000J
What can One Joule
Jo le
of energy do?
http://kk.org/mt-files/thetechnium-mt/Battery%20Energy%20Density.jpg
Mow your
lawn for
1 ms
Operate a
processor
for ~ 7s
Send a 1
Megabyte
file over
802.11b
Moore’s law for batteries… snails pace!
Today: Understand where power goes
and ways to manage it
Credit: Anantha Chandraksan
Lecture 14
13
Trends: Energy Scavenging
MEMS Generator
Power Harvesting Shoes
Joe Paradiso
((Media Lab))
Jose Mur Miranda/
Jeff Lang
Vibration-to-Electric
Conversion
After 3-6 steps, it provides
3 mA for 0.5 sec
~10mW
~ 10W
Lecture 14
14
Low-Profile Wearable Body-Powered
Thermoelectric Generator
• Low
Low profile,
profile lightweight,
lightweight conformal
conformal.
• Utilization of small temperature difference
• Utilization of natural convection for coolingg
Credit: Krishna Settaluri MIT ‘2010
Lecture 14
15
Experimental Results
15mV
Optimal Electrical Load Resistance
33Ω
(20Ω theoretical)
Optimized Power
Optimized Power
16 TEG Islands (2 TEG modules)
11µW
Credit: Krishna Settaluri MIT ‘2010
Lecture 14
16
Body‐Powered, Flex EKG System
Credit: Krishna Settaluri MIT ‘2010
Lecture 14
17
Board Layout
EKG Leg
g Inputs
p
64
6.4cm
EKG Chip
Interface to external
world
Voltage regulation
• Thin flex substrate – 0.0074 in ~ 0.02cm
Credit: Krishna Settaluri MIT ‘2010
Lecture 14
18
Resistor High Frequency Performance
• M
Metal film resistors have t l fil
it h
coils of metallic film
• Surface mount resistors Surface mount resistors
have a higher parallel capacitance
6.101 Spring 2015
Lecture 14
C
L
19
Capacitors – Frequency Limitations
Type
Max Frequency
L
Aluminum Electrolytic
100kHz
Tantalum Electrolytic
1MHz
Mica
500MHz
Ceramic
1GHz
C
Use HP Impedance Bridge to measure
6.101 Spring 2015
Lecture 14
20
Inductors* High Frequency Performance
• DC resistance of windings
DC i t
f i di
• Capacitance between turns b
of wires and layers of wires
L
C
Use HP Impedance Bridge to measure
* choke
6.101 Spring 2015
Lecture 14
21
PCB – Printed Circuit Board
• Invented by Paul Eisler circa 1930’s
• Used in WW 2 radios
di
2 di
• Released after WW 2 for commerical use by US A
US Army
• General commercial use in 1950’s
• Zenith Radio/TV last to implement PCB’s in h d / l
l
’
manufacturing process – 1960’s
6.101 Spring 2015
Lecture 14
22
Zenith Marketing Spin
6.101 Spring 2015
Lecture 14
23
PCB – Printed Circuit Board
• FR‐4 glass epoxy, high strength a elevated temperature self extinguishing
temperature, self extinguishing
• FR “Flame retardant”
• Type two layer or four (or more) pcb
T
t l
f
(
) b
• 1oz PCB: (1oz cu per sq ft)
• Silkscreen: labels components on PCB lk
l b l
• Solder mask: lacquer like polymer applied to prevent solder bridges and oxidation
t ld b id
d id ti
6.101 Spring 2015
Lecture 14
24
PCB Files
• Netlist: a text file describing connectivity of the design
• G
Gerber file: de facto standard used by PCB b fil d f t t d d
d b PCB
industry software to describe the printed circuit board images: copper layers solder mask
board images: copper layers, solder mask, legend, drill holes
6.101 Spring 2015
Lecture 14
25
PCB General Rules
• Where ever possible, make the botton layer a ground plane
• Be careful of autorouters – all grounds not the same!
• Coupling between traces: incidental capacitive Coupling between traces: incidental capacitive
coupling; 0.75mm x 7.5mm run with 0.188 thickness creates a 1pF cap
• Cross talk
• Trace resistance : 10mil trace 0.048ohm/inch for 1oz Cu (35um thickness, 1cm cu cube = 1.7uohm) • Avoid 90 deg turns, use 45 deg turns
6.101 Spring 2015
Lecture 14
26
PCB Trace
• PCB trace are transmissions lines
• 90 deg corners results in reflections
d
l i
fl i
• Use 45 deg turns
http://www.ti.com/sc/docs/apps/msp/journal/aug2000/aug_09.pdf
6.101 Spring 2015
Lecture 14
27
PCB Design Software
• Eagle (cadsoft)
– Free download available (Eagle light). – Limitations:
• The useable board area is limited to 100 x 80 mm (4 x 3.2 inches).
• Only two signal layers can be used (top and bottom).
• The schematic editor can only create one sheet.
• Expresspcb
b
– Free download
– Limitations:
• 4 layer max
• No netlist import
6.101 Spring 2015
Lecture 14
28
Surface Mount Technology
• Higher component density
• Simpler and faster automated assembly = Simpler and faster automated assembly =
lower manfacturing costs
• Lower component costs
• Terminology: gy
– capacitors and resistors: length x width
0805 (0.079in x 0.049in = 2.0mm x1.25mm
– Transistors: SOT Small Outline Transistor
– IC’s: SOIC Small Outline Integrated Circuit
IC’ SOIC S ll O tli I t
t d Ci it
– BGA: Ball Grid Array
6.101 Spring 2015
Lecture 14
29
PCB Layout Example
Express PCB
p ess C
• LF353 (use LT1413), 2 resistor, capacitor, DB‐9 connector
• Trace width
T
id h
• Digikey link
• Top/bottom trace selections
/
• Simple ordering
6.101 Spring 2015
Lecture 14
30
PCB Layout Process
•
•
•
•
•
Draw schematic
Label components: resistors, caps, IC
Save schematic
Link PCB layout with schematic
Connect components
Connect components
6.101 Spring 2015
Lecture 14
31
PCB Schematic
6.101 Spring 2015
Lecture 14
32
PCB Layout
6.101 Spring 2015
Lecture 14
33
Thu Lecture/Lab (EDS)
•
Surface mount a 1.4 watt class D stereo amplifier
l D
lifi
•
USB powered
•
84% efficiency at 400mw
•
Short circuit and thermal protection
6.101 Spring 2015
Lecture 14
34
Class D Amplifier* ‐ Refresher
BTL – Bridge Tied Load
*http://www.maximintegrated.com/en/app-notes/index.mvp/id/3977
6.101 Spring 2015
Lecture 14
35
Reminder
• Tue 4/14, Thu 4/16: Project Presentation
6.101 Spring 2015
Lecture 14
36