Constant-Frequency Soft-Switching Converters
• Introduction and a brief survey
• Active-clamp (auxiliary-switch) soft-switching converters,
• Active-clamp forward converter
• Textbook 20.4.2 and on-line notes
• The zero-voltage transition full-bridge converter
• Textbook Section 20.4.1 and on-line notes
• DC Transformer
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Soft-switching converters with constant switching frequency
• With two or more active switches, we can obtain zero-voltage switching in converters operating at constant switching frequency
• The second switch may be one that is already in the PWM parent converter switch is a (hopefully small) additional “auxiliary” switch
Examples:
• Two-switch quasi-square wave (with synchronous rectifier)
• Two-switch multiresonant (with synchronous rectifier)
• Active-clamp switch (forward, flyback, other converters)
• Phase-shifted bridge with zero voltage transitions
• These converters can exhibit stresses and characteristics that approach those of the parent hard-switched PWM converters, but with zero-voltage switching over a range of operating points
2 ECEN 5817
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Two-switch ZVS-QSW converters: already studied
Original one-switch version
Add synchronous rectifier
• Q2 can be viewed as a
• Additional degree of control is possible: let Q2 conduct longer than D2 would otherwise conduct
• Constant switching frequency control is possible, with behavior similar to conventional
PWM
• Can obtain µ < 0.5
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The multiresonant switch
Basic single-transistor version
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2-switch
(synchronous rectifier) version
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Multiresonant switch characteristics
Single transistor version
Analysis via state plane in supplementary course notes
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Multiresonant switch characteristics
Two-transistor version with constant frequency
Favorable characteristics and wide ZVS range in constant-frequency operation
Voltage and current stresses are 2-3 higher than in the PWM parent
6 ECEN 5817
ECEN5817, ECEE Department, University of Colorado at Boulder

ZVS active clamp circuits
The auxiliary switch approach
Forward converter implementation Flyback converter implementation
• Main switch plus auxiliary switch behave as an (unloaded) ZVS-QSW converter resulting in zero-voltage transitions
• Improved transformer reset, improved transistor utilization
• Beware of various patents (e.g. Vinciarelli (1982) for use in forward converter)
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Zero-voltage transition converters
The phase-shifted full bridge converter
Buck-derived full-bridge converter bridge section
Each half-bridge produces a square wave voltage. Phase-shifted control of converter output
A popular converter for server frontend power systems
Efficiencies of 90% to 95% regularly attained
Controller chips available
8 ECEN 5817
ECEN5817, ECEE Department, University of Colorado at Boulder

Active-clamp (auxiliary-switch) soft-switching converters
• Can be viewed as a lossless voltage-clamp snubber that employs a auxiliary current-bidirectional switch
• Operation (resonant transitions) similar to ZVS-QSW operation
• Can be added to the transistor in any PWM converter
• Not only adds ZVS to forward converter, but also resets transformer better, leading to better transistor utilization than conventional reset circuit
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The conventional forward converter
ECEN 5817
• Max v ds
= 2 V g
+ ringing
• Limited to D < 0.5
• On-state transistor current is P / DV g
• Magnetizing current must operate in
DCM
• Peak transistor voltage occurs during transformer reset
• Could reset the transformer with less voltage if interval 3 were reduced
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ECEN 5817

The active-clamp forward converter
• Better transistor/transformer utilization
• ZVS
• Not limited to D < 0.5
Transistors are driven in usual half-bridge manner, similar to 2-switch ZVS-QSW:
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Approximate analysis: ignore resonant transitions, dead times, and resonant elements
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Charge balance
V b can be viewed as a flyback converter output. By use of a currentbidirectional switch, there is no DCM, and L
M operates in CCM
Similar to an unloaded two-switch ZVS-QSW converter
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Peak transistor voltage
•
Max v ds
= V g
+ V b
= V g
/ D’ which is less than the conventional value of 2 V g when D > 0.5
•
This can be used to considerable advantage: improved transistor and transformer utilization
• Design example:
270 V ≤ V g max P load
≤ 350 V
= P = 200 W
Compare designs using conventional 1:1 reset winding and using active clamp circuit
14 ECEN 5817
ECEN5817, ECEE Department, University of Colorado at Boulder

Conventional case
Peak v ds
= 2 V g
+ ringing
Let’s let max D = 0.5 (at V g
270 V), which is optimistic
=
Then min D (at V g
= 350 V) is
(0.5)(270)/(350) = 0.3857
 i g
 = DnI = Di d-on with P = 200 W = V g
 i g
 = DV g i d-on
So i d-on
= P/DV g
= (200W) / (0.5)(270 V) = 1.5 A
15 ECEN 5817
Active clamp case: scenario #1
Suppose we choose the same turns ratio as in the conventional design. Then the converter operates with the same range of duty cycles, and the on-state transistor current is the same. But the transistor voltage is equal to V g
/ D’ , and is reduced:
At V g
= 270 V:
At V g
= 350 V:
D
D
= 0.5
= 0.3857
peak peak which is considerably less than 700 V v v ds ds
= 540 V
= 570 V
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ECEN 5817

Active clamp case: scenario #2
Suppose we operate at a higher duty cycle, say, D = 0.5 at V g
= 350 V. Then the transistor voltage is equal to V g
/ D’ , and is similar to the conventional design under worst-case conditions:
At V g
= 270 V:
At V g
= 350 V:
D = 0.648
D = 0.5
peak v ds
= 767 V peak v ds
= 700 V
But we can now use a lower turns ratio that leads to lower reflected current in Q1: i d-on
= P/DV g
= (200W) / (0.5)(350 V) = 1.15 A
Conclusion: the active clamp circuit resets the forward converter transformer better. The designer can use this fact to better optimize the converter, by reducing the transistor blocking voltage or on-state current.
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Active clamp forward converter analysis of operating waveforms and characteristics
D
3
D
4
D
2
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Waveforms
(including L l
)
D
3
D
4
D
2
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Discussion
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Details: different modes
• Interval 3 can end either when D3 becomes reverse-biased when i l reaches zero or by D2 becoming forward biased when v ds reaches V g
+ V b
• In either case, both end by the end of interval 4
• Similar discussion (in reverse) applies to intervals 7 and 8
21 ECEN 5817
Simplified waveforms
(neglecting L l
)
D
2
D
3
D
4
• Secondary-side D3/D4 switching is ideal instantaneous
• Primary side ZVS predicted well (pessimistic ZVS boundary)
22 ECEN 5817
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State-plane analysis (neglecting L l
)
D
2
D
3
D
4
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State-plane analysis (neglecting L l
)
D
2
D
3
D
4
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State-plane analysis (neglecting L l
)
D
2
D
3
D
4
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State-plane analysis (neglecting L l
)
D
2
D
3
D
4
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State plane trajectory including intervals 5 and 6
Averaging
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D
2
D
3
D
4
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Averaging
D
2
D
3
D
4
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Averaging
D
2
D
3
D
4
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Average output voltage
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The system of equations that describes this converter page 1
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The equations that describe this converter page 2
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Results
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ECEN 5817

Basic switch network reduces to: is an ac short circuit, then we obtain alternately switching transistors—original
MOSFET plus the auxiliary transistor, in parallel. The tank L and resonant transitions)
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Example: addition of active clamp circuit to the boost converter
ECEN 5817
The upper transistor, capacitor C b
, and tank inductor are added to the hard-switched PWM boost converter. Semiconductor output capacitances
C ds are explicitly included in the basic operation.
36 ECEN 5817
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Active clamp circuit on the primary side of the flyback converter
37 ECEN 5817
ECEN5817, ECEE Department, University of Colorado at Boulder