ThE1-4
37th IEEE Power Electronics Specialists Conference / June 18 - 22, 2006, Jeju, Korea
A Carrier Based PWM Algorithm for
Indirect Matrix Converters
Bingsen Wang
Giri Venkataramanan
Department of Electrical and Computer Engineering
University of Wisconsin-Madison
1415 Engineering Drive
Madison, WI 53706 USA
bingsen@cae.wisc.edu; giri@engr.wisc.edu
Abstract— In this paper, the indirect matrix converter is
systematically studied with the single-pole-multiple-pole
representation. A carrier based PWM algorithm is developed
in two steps. First, the continuous modulation functions for all
the throws are derived based on the desired sinusoidal input
currents. Then the switching functions are derived from the
modulation functions with focus on the zero current
commutation. The proposed PWM algorithm is verified by
numerical simulation and hardware experimentation on a
laboratory prototype matrix converter.
I.
INTRODUCTION
Various attractive features of the matrix converter, such as
a potential for high power density through elimination of
bulky passive components, high quality input and output
current/voltage waveforms, are leading to continuous
research efforts to enable their adoption widely [1-6]. While
the matrix converter was first studied as a class of frequency
changers realized using controlled switches by Gyugyi [7],
significant progress in high frequency synthesis was made by
Venturini in 1980 [8-10], with voltage transfer ratio limited
to one half. An improved modulation strategy with a voltage
transfer ratio of 0.866 was published in 1989 [11, 12]. In
addition to Venturini’s modulation methods, indirect
modulation methods based on a fictitious dc link concept
[13-18] and space vector techniques have been developed
further [17, 19-23]. Irrespective of the modulation methods
used, robust commutation is critical, as has been extensively
investigated and examined [24-30]. As an alternative to the
standard 9-switch topology, the rectifier-inverter-without-dclink structure and its variations have been carefully examined
[16, 31-37], leading to a simple and robust commutation on
the basis of its topological properties [34].
A space vector modulation scheme for the indirect matrix
converter (IMC) was developed with focus on the desired
output voltage in [34]. In this paper, a carrier based PWM
algorithm is proposed and derived based on the desired
sinusoidal input currents and output voltages. The derivation
proceeds with the calculation of modulation functions
followed by the generation of switching functions. Compared
1-4244-9717-7/06/$20.00
2006 IEEE.
to the space vector modulation scheme, the proposed carrier
based PWM algorithm demands less computational
complexity, while retaining the features of simple and robust
commutation. Thus, resources of the digital signal processor
commonly employed in the practical realization will be
available to assume complex computational tasks for the
controller rather than the modulator. Furthermore, with more
increasingly available field programmable gate array
(FPGA), the firmware implementation of carrier based PWM
algorithm may feature the reliability of hardware and the
flexibility of software.
The paper is organized as follows: In Section II the IMC is
represented using single-pole-multiple-throw (SPMT)
switches. The modulation functions are derived in Section III
followed by switching functions presented in Section IV. The
numerical simulation and the experimental results are
presented in Section V and Section VI, respectively. A
summary of the paper is presented in the concluding section.
II.
IMC REPRESENTED BY SPMTS
A family of various IMC realizations has been developed
from the topology shown in Fig. 1 by imposing additional
operating constraints such as unidirectional power flow
and/or limited power factor range. Some of the realizations
that introduce additional operating constraints feature
reduced number of controlled-switch count [35]. The focus
of this paper is on the IMC topology without reduced switch
count, since bidirectional-power capability and the wide
power factor range of this converter are of primary interests
to the authors. However, the PWM algorithm developed here
can be readily applied to the reduced-switch topologies with
little or minor modifications.
The IMC topology shown in Fig. 1 consists of a cascaded
connection of two bridge converters. One bridge is connected
to a set of voltage-stiff sources va, vb and vc, which would be
formed using capacitors in practical implementations. The
other bridge is connected to a set of current-stiff sources iu,
iv, iw, which would be realized using inductors in practical
implementations. The bridge connected to the voltage-stiff
sources acts like a current source converter in terms the
voltage constraints at the three-terminal port and current
- 2780 -
constraints at the two-terminal port, i.e. the voltage-stiff
sources may never be short-circuited and the link current
may never be open-circuited. Hence, we may call this bridge
as current source bridge or CSB. In a dual manner, the bridge
connected the current-stiff sources acts like a voltage source
converter in terms of the voltage constraints at the twoterminal port and the current constraints at the three-terminal
port, i.e. the stiff currents may not be open-circuited and the
link voltage should never be short-circuited. Thus, we may
call this bridge as voltage source bridge or VSB.
These inherent operational constraints to the IMC
topology can be accommodated by the graphic representation
as shown in Fig. 2, where the CSB is represented by two
single-pole-triple-throw (SPTT) switches Sp and Sn and the
VSB is represented by three single-pole-double-throw
(SPDT) switches Su, Sv, Sw. With this arrangement, the
throws in each switch can be modulated independently
without violating the terminal constraints.
III.
For three-phase ac power conversion, the stiff voltages and
stiff currents at the ac ports shown in Fig. 2 may be assumed
to be balanced three-phase quantities given by
VSB
ip
+
-
va
+ a
-
vb
+ b
vpn
- vc + c
u
iu
v
iv
iw
w
-
Fig. 1 Schematic of the IMC topology under study.
n
va
-
vb
-
vc
Tbp
iw
i
i
o
o
ia _ ref = I i _ ref cos ( β i (t ) )
(2)
ib _ ref = I i _ ref cos ( β i (t ) − 2π / 3)
ib _ ref = I i _ ref cos ( β i (t ) + 2π / 3)
where βi ( t ) = ωi t + βi 0 .
A. CSB Modulation Functions
Each fundamental period of the ac quantities at the CSB
port may be divided into six sectors as shown in Fig. 3. If we
assume the moving average of the dc link current to be
constant, the modulation of the CSB would be identical to
that of a PWM current source ac-dc converter. If the desired
reference input phase current is maximum during one sector,
then the corresponding throw of Sp is closed during the entire
sector. The dc link current returns through one of the three
throws of Sn, through appropriate commutation. Similarly, if
the reference phase current is minimum during one sector,
the corresponding throw of Sn is closed during the entire
sector. The dc link current returns through one of the throws
of Sp through appropriate commutation. Notice, if the throws
corresponding to the same phase of Sp and Sn are closed
simultaneously (termed a zero state of the CSB), each of the
ac line currents are zero. Thus by varying the interval of the
zero state, the current source converter may be modulated to
regulate the amplitude of the ac fundamental component of
the line currents, with a constant dc link current.
Sector 1
vu
Sw
+ ib
vpn
Su
Sv
Twp
Tup
Tvp
Twn
Tun
Tvn
+ ic
vv
vw
Sn
vc
(1)
(
3)
= I cos ( β ( t ) + 2π )
3
βo(t) is the phase angle of the current source, given
by β o ( t ) = ωot + β o 0
The desired fundamental components of the currents at the
ac terminals of the CSB may be expressed as
Tcp
+ ia
Tan
iv = I o cos β o ( t ) − 2π
;
(
3)
= V cos (α ( t ) + 2π )
3
where Vi is source voltage amplitude;
Io is the current source amplitude;
αi(t) is the phase angle of the voltage source, given
by αi ( t ) = ωi t + αi 0 ;
+
-
vb = Vi cos αi ( t ) − 2π
ip
Sp
Tap
iu = I o cos ( β o ( t ) )
Consequently, the power factor angle on the CSB becomes
(3)
φi = αi 0 − βi 0
MODULATION FUNCTIONS
CSB
va = Vi cos (αi ( t ) )
Tbn Tcn
-
ia_ref
iu
Sector 2
Sector 3
ib_ref
Sector 4
Sector 5
Sector 6
ic_ref
iv
iw
Fig. 3 Waveforms of typical sinusoidal reference currents at the CSB ac
port, divided into six intervals.
Fig. 2 Schematic of the IMC represented using SMPTs.
- 2781 -
Alternatively, in the proposed modulation strategy for the
IMC, the amplitude of the ac fundamental component of the
line currents are regulated by modulating the VSB, without
using zero states for the CSB and not compromising any
waveform quality. For example, throw Tap is closed Tan is
open during the entire interval of Sector 1, and the
corresponding modulation functions map is 1 and man is 0.
The dc link current flows through Tap, and returns through
Tbn or Tcn. In order for this modulation approach to be
successful a key modulation assumption needs to be satisfied,
namely, the averaged link current may be regulated (by
appropriately modulating the VSB, as will be illustrated in
the following subsection) to follow the reference current ia_ref
during Sector 1. Then, it follows that the modulation
functions mbn and mcn can be determined to be
mbn = −
ib _ ref
mcn = −
ic _ ref
ia _ ref
TABLE I.
Sector 1
MODULATION FUNCTIONS FOR THE THROWS OF CSB.
Sector 2
map
1
−
ia _ ref
mbp
0
−
ib _ ref
mcp
0
0
man
0
0
mbn −
mcn −
Sector 3
Sector 4
Sector 5
0
0
0
ic _ ref
ic _ ref
ib _ ref
−
0
ia _ ref
ic _ ref
−
0
−
ib _ ref
ic _ ref
−
1
ia _ ref
ia _ ref
ib _ ref
ic _ ref
1
−
ia _ ref
0
−
ib _ ref
0
ib _ ref
−
0
ia _ ref
0
1
ia _ ref
1
Sector 6
ia _ ref
ib _ ref
0
−
ic _ ref
ib _ ref
0
ic _ ref
1
ic _ ref
0
0
(4)
Sector 1
ia _ ref
1
It may be noticed that the amplitude of the reference
currents Ii_ref does not appear in (4), and thus the modulation
functions of the CSB only determine the phase angle of the
synthesized current relative to the stiff voltage source. In
other words, while the power factor angle of CSB currents is
set by the modulation functions, amplitude of the synthesized
currents are determined indirectly by the VSB (naturally,
through power balance considerations). Extending this
strategy to the other sectors of the CSB ac current references,
the modulation functions for each throw of the CSB of can
be calculated as tabulated in TABLE I. The corresponding
waveforms of modulation functions are also plotted in Fig. 4.
B. VSB Modulation Functions
Having determined the modulation functions for the
throws of CSB during the entire period, we proceed to
calculate the modulation functions of the VSB, to synthesize
appropriate output voltage, while validating the key
modulation assumption from the previous subsection. The
modulation functions for each of the three phase-legs for the
VSB can be expressed as
mu = M o cos (αo (t ) )
(5)
mv = M o cos (αo (t ) − 2π / 3)
Sector 2
Sector 3
map
1
mcn
Validation of the key modulation assumption is made
through making the modulation index Mo to be a time
varying function, as described further. Furthermore, in the
conventional sine-triangle scheme, the modulation functions
Sector 6
mcp
man
mbn
0
Fig. 4 Typical waveforms of modulation functions for the various throws of
CSB.
for each phase leg is shifted and scaled to obtain the
modulation functions for throws of the switches. For
instance, the modulation functions for the throws Tup, Tvp and
Twp are
mup =
mvp
(1 + mu )
(1 + mv )
=
mwp =
harmonics are adopted, Mo can reach 2/√3 without overmodulation. The power factor angle φo at the VSB terminals
is defined by
(6)
φo = αo 0 − β o 0
Sector 5
0
mw = M o cos (αo (t ) + 2π / 3)
where Mo is the modulation index and 0 < Mo < 1 and the
phase angle αo ( t ) = ωot + αo 0 . If injection of triplen
Sector 4
mbp
2
(7)
2
(1 + mw )
2
Now, the average of the link current may be determined to be
i p = mupiu + mvpiv + mwpiw
(8)
Substituting the expressions for the output currents iu, iv and
iw from (1) into (8), the averaged link current may be
determined to be
3
(9)
i p = M o I o cos φo
4
The key modulation assumption requires that <ip> should
follow ia_ref during Sector 1, and ic ref during Sector 2, etc.
- 2782 -
corresponding to the unity modulation index rows of TABLE
I. , under each sector. Thus during Sector 1,
ia _ ref
3
= M o I o cos φo
4
(10).
In order to validate (10), the amplitude Mo of the VSB
modulation function, being the only free variable may be
determined to be
M o (t ) =
4 I i _ ref
cos ( β i (t ) )
3 I o cos φo
(11)
using (2) during Sector 1. Through reciprocity, Mo(t) during
Sector 1 may also be expressed as
M o (t ) =
4 Vo _ ref
cos ( β i (t ) )
3 Vi cos φi
(12)
The variation of Mo(t) during other sectors of the CSB
current reference waveforms can be determined in a similar
manner, as tabulated in TABLE II. The resultant modulation
function amplitude Mo(t) together with the modulation
functions for each phase-leg of the VSB are plotted in Fig. 5.
TABLE II.
VSB MODULATION FUNCTION AMPLITUDE IN DIFFERENT
SECTIONS.
Mo(t)
4 Vo _ ref
cos ( β i (t ) )
3 Vi cos φi
4 Vo _ ref
−
cos β i (t ) + 2π
3
3 Vi cos φi
4 Vo _ ref
cos β i (t ) − 2π
3
3 V cos φ
Sector 1
(
Sector 2
(
Sector 3
i
)
)
i
4 Vo _ ref
−
cos ( β i (t ) )
3 Vi cos φi
4 Vo _ ref
cos β i (t ) + 2π
3
3 Vi cos φi
4 Vo _ ref
−
cos β i (t ) − 2π
3
3 Vi cos φi
Sector 4
(
Sector 5
)
(
Sector 6
)
Mo(t)
Fundamental period of the CSB ac
quantities divided into 6 sectors
π
ωi
mu(t)
2π
ωi
mv(t)
mw(t)
π
ωo
3π t
ωi
2π t
ωo
Fig. 5 Waveforms of VSB modulation amplitude Mo(t) and phase leg
modulation functions mu(t), mv(t), mw(t).
IV.
SWITCHING FUNCTIONS
Once the modulation functions are derived, the switching
function hxy for each throw Sxy can be determined with
special care of the switching sequence.
A. CSB Switching Functions
The CSB switching functions are generated by comparing
the modulation functions shown in Fig. 4 with a linear carrier
at the switching frequency. However, the alignment of the
PWM pulses with respect to the carrier has to be carefully
chosen to eliminate abrupt discontinuities at sector
boundaries. It may be observed from Fig. 4, that during each
sector there are only two unclamped (or active) modulation
functions, one of them decreasing and the other increasing
and all the other modulation functions are clamped (or
inactive) at either zero or unity. At each sector boundary one
of the active modulation functions becomes inactive
(clamped at zero or unity), and an inactive modulation
function becomes active. In order to preclude any
discontinuities in PWM pulses at sector boundaries, the
following simple conditions needs to be satisfied: For
positive throws, increasing pulse widths have to be left
aligned and decreasing pulse widths have to be right aligned;
for negative throws, increasing pulse widths have to be right
aligned and decreasing pulse widths have to be left aligned.
Such a strategy using a saw-tooth carrier to generate the
switching function hbn and the hcn is obtained by inverting hbn
as illustrated in Fig. 6. It can be observed that all PWM
pulses are continuous during all sector boundaries.
B. VSB Switching Functions
Switching events of VSB switching events are coordinated
with the CSB switching events, such that CSB commutation
takes place when the link current is zero [34]. To illustrate
the coordination between the VSB and CSB, a single
switching cycle of during “Sector 2” from Fig. 6 is zoomed
in as illustrated in Fig. 7. It may be noted that the carrier
waveform of the VSB carrier triangle is not symmetrical as
would be typical. Instead, the rising interval d1Ts and the
falling interval d2Ts of VSB carrier are determined by the
CSB switching functions. In this manner, the two CSB
commutation events in each switching cycle always take
place during the zero states of VSB, i.e. when either all the
three top throws or all the three bottom throws of the VSB
are connected to the link bus. During the zero states, the link
current is zero. Therefore CSB can commutate with zero link
current, which eliminates the switching losses, and the need
for overlap time, eliminating any possible short circuit
between stiff voltages feeding the CSB.
V.
NUMERICAL SIMULATION VERIFICATION
In order to verify the modulation scheme described in
Section III and Section IV, a numerical simulation has been
carried out on a detailed model built using MatlabSimulink®.
- 2783 -
Sector 1
Sector 2
Sector 3
Sector 4
Sector 5
Sector 6
CSB
carrier
mbn
hap
mbp
mcn
mcp
man
map
hcn
hbp
Right aligned
Left aligned
han
hcp
Right aligned
hbn
Left aligned
Fig. 6 Waveforms illustrating the generation of CSB switching functions.
Schematic of the power circuit used in this simulation is
shown in Fig. 8 with the parameters listed in TABLE III.
Selected waveforms from the simulation results are plotted in
Fig. 9 - Fig. 11. The currents drawn from the source and load
currents are shown in Fig. 9. Fig. 10 illustrates the source
voltage of ‘a’ phase va, the filter capacitor voltage of ‘a’
phase vCf-a, the link voltage vpn and the source current of ‘a’
phase ia. In this simulation, unity power factor on the input
side is selected. Fig. 11 shows the output line-line voltage
vuv, the line-neutral voltage vu, the link voltage vpn and the
load current iu.
CSB carrier
CSB modulation
functions
mbp
CSB switching hap
functions
hbp
+
- va +
mup
iu
ia
Lf
VSB carrier
+
ib
- vc +
ic
-
VSB modulation m
vp
functions
vb
vpn
vu
+
vCf-a
-
Lload
Cf
-
-
VSB zero states
hup
VSB switching
functions
Fig. 8 Schematic of the power circuitry used for simulation and
experimental test.
hvp
hwp
TABLE III.
d1Ts
d2Ts
Fig. 7 Waveforms illustrating of the coordination between the VSB and the
CSB commutation processes
va,b,c
Lf
Cf
finput
- 2784 -
-
iv
iw
+
mwp
+
vuv
LIST OF PARAMETERS FOR SIMULATION
100 Vpk_l_n
200 μH
30 μH
60 Hz
fswitching
Rload
Lload
foutput
10 kHz
8Ω
10 mH
40 Hz
Rload
VI.
(A)
5
i
a,b,c
0
-5
0
0.01
0.02
0
0.01
0.02
0.03
0.04
0.05
0.03
0.04
0.05
10
u, v, w
(A)
5
i
0
-5
-10
t (s)
Fig. 9 Waveforms of source currents (top panel) and load currents (bottom
panel) obtained using simulations.
va
100
0
-100
vCf-a
100
0
0.01
0.02
0.03
0.04
0.05
0
0.01
0.02
0.03
0.04
0.05
0
0.01
0.02
0.03
0.04
0.05
0
0.01
0.02
0.03
0.04
0.05
EXEPRIMENTAL RESULTS
In order to further validate the proposed modulation
algorithms, a prototype of the converter has been constructed
in the laboratory. A photograph of the prototype converter is
shown in Fig. 12. The DSP board is used as the controller
platform. The modulation scheme described in proceeding
sections is implemented in the FPGA on the DSP board.
The measured gating signals for the six throws in CSB and
VSB are shown in Fig. 13. It can be observed at no instant
the top and bottom throws in the same phase leg are closed
simultaneously, i.e. no zero states in the CSB modulation.
Fig. 14 illustrates that the CSB only commutates when the
link current is zero. The top three traces in Fig. 14 are
switching signals for the three top throws in VSB. The
switching events, as shown in the bottom trace, only happen
when the top throws in VSB are all closed or all open, which
corresponds to zero link current for either case. Selected
waveforms (corresponding to the simulation waveforms from
Fig. 9 - Fig. 11) are shown in Fig. 15 - Fig. 16, illustrating
excellent conformity.
0
-100
vpn
200
100
0
ia
5
0
-5
t (s)
Fig. 10 Waveforms of source voltage, filter capacitor voltage, link voltage
and source current, obtained using simulations, from the top to bottom,
respectively.
0
0.05
20
10
0
-10
20
10
0
-10
20
10
0
-10
20
10
0
-10
20
10
0
-10
ap
20
10
0
-10
0
0.01
0.02
0.03
0.04
0.05
cp
100
bp
200
Fig. 12 A photograph of the prototype of the converter used for obtaining
experimental tests.
T (V)
0.04
T (V)
0.03
T (V)
0.02
0
-200
vpn
0.01
T (V)
vpn
200
0
T (V)
-200
T (V)
vAB
200
0.01
0.02
0.03
0.04
0.05
0
-10
bn
iA
0
an
0
10
0
0.01
0.02
0.03
0.04
0.05
cn
t (s)
Fig. 11 Waveforms of load l-l voltage, load l-n voltage, link voltage and
load current obtained using simulations, from the top to bottom
respectively.
0
0.005
0.01
0.015
0.02
0
0.005
0.01
0.015
0.02
0
0.005
0.01
0.015
0.02
0
0.005
0.01
0.015
0.02
0
0.005
0.01
0.015
0.02
0
0.005
0.01
0.015
0.02
t (s)
Fig. 13 Waveforms of measured of gating signals for the CSB throws: from
top to bottom Tap, Tbp, Tcp, Tan, Tbn, Tcn, obtained using the laboratory
prototype.
- 2785 -
vuv (V)
20
Tup (V)
10
0
-10
0.0366
0.0367
vu (V)
0.0365
20
10
Tvp (V)
100
0
-100
-200
0
-10
0.0366
0.0367
Twp (V)
10
0
0.0367
Tap (V)
-10
0.0365
0.0366
t (s)
0.0367
0.03
0.035
0.04
0.045
0
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
0
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
0
0.005
0.01
0.015
0.02
0.025
t (s)
0.03
0.035
0.04
0.045
0
CSB Switching Events
Fig. 14 Illustration of the zero current commutation of the CSB, from top to
bottom are measured gating signals for throws Tup, Tvp and Twp of the VSB
and Tap of the CSB obtained using the laboratory prototype..
Fig. 17 Waveforms of load l-l voltage, load l-n voltage, link voltage and
load current obtained using the laboratory prototype, from the top to bottom
respectively.
VII. CONCLUSIONS
5
ia, b, c (A)
0.025
-5
0
A carrier based modulation scheme has been presented for
the IMC, by identifying them to be a cascade connection of a
CSB and a VSB. The modulation functions for the two
bridges are developed from the modulation functions derived
from the desired CSB currents and VSB voltages. Then the
switching functions are generated with particular focus on
the coordination between the CSB and VSB switching events
to realize a robust commutation. The proposed algorithm has
been verified by both numerical simulation and hardware
experiments, validating the effectiveness of the modulation
scheme. The modulation strategy is simple to implement
using general purpose digital signal processors in
conjunction with FPGAs as well as using application specific
digital signal processors with built in PWM operational
modules.
Although the 18-active-switch topology is used in the
analytical development and laboratory tests, the proposed
modulation algorithm can be applied the reduced-switchcount topologies with no or minimal modifications. Further
the modulation functions can be extended to the conventional
matrix converter (CMC) by the mapping relationship
between CMC and IMC, which will be explored in the future
publications.
0
-5
0
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
0
0.005
0.01
0.015
0.02
0.025
t (s)
0.03
0.035
0.04
0.045
5
iu, v, w (A)
0.02
5
iu (A)
0.0366
10
0
-5
Fig. 15 Waveforms of source currents (top panel) and load currents
(bottom panel) obtained using the laboratory prototype.
100
va (V)
0.015
0
0.0365
20
0
-100
0
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
0
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
100
va-Cf (V)
0.01
100
-10
0
-100
vpn (V)
0.005
200
vpn (V)
0.0365
20
0
100
0
-100
200
ACKNOWLEDGMENT
100
The authors would like to acknowledge support from the
Wisconsin Electric Machine and Power Electronics
Consortium (WEMPEC) at the University of WisconsinMadison. The work made use of ERC shared facilities
supported by the National Science Foundation (NSF) under
AWARD EEC-9731677.
0
0
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
0
0.005
0.01
0.015
0.02
0.025
t (s)
0.03
0.035
0.04
0.045
ia (A)
4
2
0
-2
-4
Fig. 16 Waveforms of source voltage, filter capacitor voltage, link voltage
and source current, obtained using the laboratory prototype, from the top to
bottom respectively.
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