Multi-Core Operating System MICROSAR-OS
Features and Configuration
© 2013
V1.05
Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
2013-06-11
AUTOSAR Multi-Core Operating System
Sample: Alarm Clock
Timer
Core 1
Core 2
OS
OS
Time Control
Alarm Control
Get Time
Alarm on/off
Poll Keyboard
Keys
Data
Set Alarm Time
State Control
Buzzer
Ring Alarm
Task
Activation
Buzzer on/off
Display
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 2
AUTOSAR Multi-Core Operating System
Reasons for Multi-Core Systems
More computing power


Similar die size

Same or lower CPU clock frequency

Parallel processing
Separation of Applications

Specialized cores (FPP, DSP)

Various operating systems on the same ECU, e.g. OSEK and Linux

Legal reasons, e.g. software originating from multiple suppliers
Functional Safety

avoidance of mutual interference
 running application software components on separated cores

Redundancy  identical application running on 2 cores
Less power dissipation


Lower CPU clock frequency

Computing power on demand, i.e. sleep modes for unused cores
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 3
AUTOSAR Multi-Core Operating System
Specifications

AUTOSAR extends the OSEK/VDX standard of operating systems.

AUTOSAR Add-ons are segmented into Scalability Classes (SC).
Memory
Protection
AUTOSAR OS
additional Functionality
SC3
SC 3
Timing
Protection
SC2
SC 4
Schedule
Tables
SC 2
SC 1
SC 3
Multi
Core
OSEK OS
AUTOSAR 4
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 4
AUTOSAR Multi-Core Operating System
OSEK/VDX System Elements
Interrupt
Task
Interrupt
ExtendedTask
BasicTask
CAN
Control
loop
Actuator
Driver
(PWM)
Event
SetEvent
Wait Event
Resource
Resource
Activate Task
Data
Resource
SetEvent
0:07 56
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 5
Alarm
AUTOSAR Multi-Core Operating System
Hardware View
CPU (Core 1)
Task Switching
Dispatcher
Interrupt
Controller
ROM (OS Code)
RAM (Stacks)
RAM (Stacks)
ROM (OS Code)
Dispatcher
CPU (Core 2)
Task Switching
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 6
System
Timer 1
System
Timer 2
AUTOSAR Multi-Core Operating System
Sample: Alarm Clock
>
Shared peripherals (RAM, ROM, Display)
>
Data transfer between cores
>
OS services across core boundaries
Timer
Core 1
Core 2
OS
OS
Time Control
Alarm Control
Get Time
Alarm on/off
Poll Keyboard
Keys
Data
Set Alarm Time
State Control
Buzzer
Ring Alarm
Task
Activation
Buzzer on/off
Spinlock
Display
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 7
AUTOSAR Multi-Core Operating System
Avoidance of Deadlocks
Core 1
Core 2
Configuration of Spinlock Hierarchy
Spinlock_1 (e.g. IO)
Synchronization
OS
Spinlock_2 (e.g. RAM)
Spinlock_3 (...)
OS
Data
Task Brake
(Priority 50)
Task VIP
(Priority 99)
Task CANRx
(Priority 20)
Task Data
Evaluation
(Priority 30)
Task RAM
Check
(Priority 10)
Task Sensor
(Priority 10)
IO
RAM
Task
Status
Spinlock
TaskData
active
Get Spinlock
IO
TaskSensor
active
Get Spinlock
RAM
TaskData
waiting (*1)
Get Spinlock
RAM
TaskSensor
Not
permitted!
Get Spinlock
IO
TaskSensor
active
Release
Spinlock RAM
TaskData
active
Get Spinlock
RAM
*1 = Task RAM is blocked, Task VIP can become active
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 8
AUTOSAR Multi-Core Operating System
Data Transfer
Global variable
- access coordination (Spinlocks)
- content synchronization
OS service
IOC
Inter OS application Communication
Core 1
OS
Core 2
Data
I/O Control
HMI
Get Time
Alarm on/off
Display Time
Set Alarm Time
Ring Alarm
Buzzer on/off
Cache A
Cache B
RAM
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 9
OS
AUTOSAR Multi-Core Operating System
Operating System Services



Inter-Core OS Services
>
Task Activation
>
Set / Get Event
>
Start / Cancel Alarms
>
Start / Stop ScheduleTables
Coordination of access to shared resources by
>
Resource (Intra-core)
>
Spinlocks (Inter-core)

Task B-1
Task A-2
activate
Task B-2
ISR B-1
Core A
Inter OS-Application Communication
Start-up synchronization of all cores
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 10
SetEvent
ISR A-1
Consistent Data exchange with OS control
>
Task A-1
Core B
IOC Buffer
AUTOSAR Multi-Core Operating System
Start-up Behavior
Core 0
Core 1
Core 2
StartUp Code
{ StartCore(1)
StartOS()
StartUp Code
StartCore(2)
StartOS()
StartUp Code
Start OS()
StartUp Hook
{ User Code() }
StartUp Hook
{ User Code() }
StartUp Hook
{ User Code() }
OS internal
OS internal
OS internal
start tasks and
alarms
start tasks and
alarms
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 11
start tasks and
alarms
AUTOSAR Multi-Core Operating System
Presentation of Configuration
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 12
AUTOSAR Multi-Core Operating System
Sample: Alarm Clock
Timer
Core 1
Core 2
OS
OS
Time Control
Alarm Control
Get Time
Alarm on/off
Poll Keyboard
Keys
IOC
Set Alarm Time
State Control
Buzzer
Ring Alarm
Task
Activation
Buzzer on/off
Spinlock
Display
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 13
AUTOSAR Multi-Core Operating System
Configuration

OS
>


Application
>
Which core shall execute the OS-Application?
>
Which OS elements (Task, ISR, Alarm, etc.) shall be assigned to the
respective OS-Application?
Spinlocks
>

How many cores shall be used?
Name of the subsequent spinlock
IOC
>
Configuration of the communication parameters
>
List of senders
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 14
AUTOSAR Multi-Core Operating System
Design Hints
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 15
AUTOSAR Multi-Core Operating System
AUTOSAR Architecture
Core 1
Core 2
Application 1
Application 2
SWC a
Application 3
SWC b
Application 4
SWC c
SWC d
RTE
Operating
System
Memory
Services
Communication
Services
I/O
Hardware
Abstraction
Memory
Hardware
Abstraction
Communication
Hardware
Abstraction
Microcontroller
Drivers
Memory
Drivers
Communication
Drivers
I/O Drivers
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 16
ECU
State
Manager
IOC
Core Test
Complex Device Drivers
Onboard
Device
Abstraction
Complex Device Drivers
IOC
Operating
System
AUTOSAR Multi-Core Operating System
Design
Core 1

Execution Time

Shared resources

Synchronization points

Data transfer between cores
OS
OS
Name
_Func_A
_Func_B
_Func_C
Execution
Exchange
Time
Data
5%
8 Byte
20%
256 Byte
13%
64 Byte
Sync
Requirements
none
none
_Func_B
Read Sensor
Data
Data
Processing
RAM
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 17
Core 2
AUTOSAR Multi-Core Operating System
Functional Safety
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 18
AUTOSAR Multi-Core Operating System
Safety - Redundancy
Hardware Comparator
Core 1
Core 2
Lockstep
OS
OS
Lockstep
Time Control
Address /
Data-Bus
Time Control
Get Time
Display Time
Get Time
Display Time
Lockstep
Ring Alarm
Ring Alarm
Lockstep
ROM
Display
RAM
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 19
MICROSAR-OS
Webinars

The webinar series about operating systems

2013-05-08 MICROSAR OS - a pre-emptive realtime multitasking operating system

2013-05-14 TimingAnalyzer – schedulability analysis of task runtime

2013-06-04 Memory and runtime protection of the MICROSAR OS operating system

2013-06-11 Introduction into the multi-core operating system from Vector

Registration to the upcoming Webinars and the list of recorded Webinars:
http://www.vector.com/vi_webinars_en.html resp.
http://www.vector.com/vi_operatingsystems_webinars_en.html

The overview of Vector’s training services:
http://www.vector.com/vi_training_en.html

We stay online for some more minutes to answer your questions. Please ask your questions
in the Q&A window.

Contact data for additional questions, product information or presentation :

helmut.brock@vector.com

+49 (0) 711 80670 385

embedded@de.vector.com
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 20
Thank you for your attention.
For detailed information about Vector
and our products please have a look at:
www.vector.com
Author:
Dr. Helmut Brock
Vector Informatik GmbH
Ingersheimer Str. 24
70499 Stuttgart
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 21