b1_3 Logic circuits

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B1.3 Logic circuits
An economist, a mathematician and a logician are travelling by train from London to
Edinburgh. Having just crossed the border, they see a brown cow standing in a field.
“Look,” says the economist, “The cows in Scotland are brown.”
“No,” argues the mathematician, “There are cows in Scotland of which at least one is brown.”
“Even that is not quite correct,” counters the logician. “There is at least one cow in Scotland,
of which one side appears to be brown.”
The final ‘linked’ experiment explores the principles and practice of digital logic circuits, and the Boolean
logic upon which they are based.
B1.3.1 Boolean logic and logic gates
Boolean logic, or Boolean algebra – named after mathematician and philosopher George Boole (1815—
1864) – was formulated as a means of expressing logical statements and their implications. Its variables
are the truth or falsehood of a situation, and of other properties or situations that were logically related
by expressions such as ‘and’, ‘or’, ‘nor’ or ‘not’. If, for example, the canteen always but only serves fish
and chips for lunch on Fridays, then the canteen menu will include fish and chips if it is Friday and
lunchtime. This may be expressed using Boolean algebra as
(fish and chips on the menu) = (today is Friday) AND (it is lunchtime).
Each of the variables – the bits in brackets – is either true or false.
Digital logic circuits represent truth and falsehood by different voltages – typically +5 V for true and 0 V
for false – and uses integrated circuits to represent functions such as AND, OR, NOR, NOT and more
complex combinations of them. These circuit elements are known as logic gates, and there are usually
several of them in a single integrated circuit chip. Each type of gate has its own logic symbol, and its
operation may be summarized in a truth table that defines the output for a given set of input
conditions. Gates may be combined to perform more complex operations, from digital watches to the
processors of modern computers. It may be shown that any logical operation may be built up from the
three fundamental operations AND, OR and NOT.
Conventionally, the ‘true’ condition is represented not by the voltage but by the digit 1, and the ‘false’
condition similarly by the digit 0. This allows the principles of a circuit to be independent of its electronic
implementation: modern, low power circuits, for example, may use +3.3 V for truth (logic level 1). The
symbols and truth tables for the three basic gates are shown below.
x
y
z
0 0 0
x
z
y
1 1 1
y
z
x
0 0 0
x
z
0 1 0
1 0 0
AND
x
y
0 1 1
z
x
1 1 1
0 1
1 0
1 0 1
OR
z
NOT
Figure 1 Symbols and truth tables for the AND, OR and NOT gates.
Note that the circle on an output (or input) indicates the NOT operation, so that the NOR function may
be implemented by combining an OR gate with a NOT gate, as shown in Figure 2 below. The
combination of an AND gate with a NOT gate is known as a NAND gate. Finally, the XOR gate performs
the ‘exclusive-OR’ function, whereby the condition is true if either input is true but not if both are. (In
quantum computing, the XOR function is generally referred to as the ‘conditional NOT’ or CNOT gate.)
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x y z
0 0 1
x
z
y
0 0 1
x
z
0 1 0
1 0 0
NOR
x y z
1 1 0
y
0 0 0
x
z
0 1 1
1 0 1
NAND
x y z
1 1 0
y
0 1 1
1 0 1
XOR/CNOT
1 1 0
Figure 2 Symbols and truth tables for the NOR, NAND and XOR/CNOT gates.
B1.3.2 Logic chips and circuits
A number of manufacturers produce integrated circuits (i.c.s) – containing within them a number of
passive and active components – that act as electronic logic gates. There are nowadays a number of
‘families’, known for example as TTL, CMOS, I2L, ECL according to the internal construction and the
voltages to which the logical ‘0’ and ‘1’ correspond. The TTL family (Transistor-Transistor Logic,
reflecting its original use of bipolar transistors) is one of the most common, and indeed has itself
evolved to have a number of variants (e.g. ‘LS’, ‘HC’, ‘HCT’, ‘ALS’) to suit a range of applications. We shall
here use the TTL HC type – the HC standing for ‘High-speed CMOS’, indicating that CMOS transistors are
now used instead of bipolar devices to allow higher speeds and lower operating powers.
The integrated circuits are themselves available in a variety of packages, of which we use the ‘DIL’ (Dual
In-Line) type. The tiny integrated circuits are wrapped in a plastic or ceramic housing, and electrical
connections are made through a number of pins with a standard spacing of 0.1” (2.54 mm) that will fit
directly into our laboratory breadboards. The number of pins on a given device depends upon its
function: it is always an even number, although some pins may have no use. A little practice may be
needed to insert the pins into the breadboard sockets, as they tend to spring outwards slightly; be
careful not to trap the pins and bend them underneath the device. Some DIL integrated circuits are
shown in Figure 3 below.
Figure 3 DIL integrated circuits.
[Kimmo Polasaari; Conrad; Rapid Electronics]
The packaged integrated circuit is identified by a manufacturer’s mark and a device number such as
SN74HC02N: here, ‘SN’ identifies the manufacturer (Texas Instruments), ‘74’ indicates that the device is
TTL, ‘HC’ shows that it is the High-speed CMOS variant, and the final ‘N’ refers to the DIL package. The
important bit for our experiments is the ‘02’, which tells us that the chip is the model that contains four
separate 2-input NOR gates. The ‘pinout’, indicating how the devices are connected internally, is shown
for four common logic i.c.s in Figure 4 below. Note that pins are traditionally numbered anti-clockwise
when viewed from above, starting next to the circular hole or D-shaped notch.
To use the integrated circuit, we must connect the power supply (to pins 7 and 14 in the cases
illustrated in Figure 4) and then connect to the gates themselves. The gate voltages are measured
relative to the ground (GND) connection. It is kind, and sometimes necessary, to connect unused inputs
to one of the power supply voltages.
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74HC00
74HC02
74HC04
74HC10
Figure 4 Integrated circuit (i.c.) pinouts for some common TTL gates. Power supplies are connected to the pins labelled GND (0 V) and VCC
(+5 V).
[SGS Thomson Microelectronics (now ST Microelectronics: http://www.st.com)]
The simple example circuit shown below turns on the light-emitting diode (LED) only when the two
push-button switches are both pressed. This is just an illustration - you can doubtless think of simpler
ways of arranging this that don’t need logic gates – but it covers most of the principles that you’ll need
to implement more complex circuits. The push-button switches set the gate inputs to logic ‘1’ (+5 V)
when the switches are pressed, while resistors R1 and R2 ensure that the inputs are at logic ‘0’ (0 V)
otherwise. Pins 7 and 14 of the NAND gate i.c. are connected to 0 V and +5 V respectively, and the
unused inputs (pins 9, 10, 12 and 13) are also connected to +5 V. The second NAND gate acts as a NOT
gate (we could use a separate 74HC04 NOT gate, but this would require a second integrated circuit), so
that the pair together work as an AND gate. Resistor R3 controls the current supplied to the LED when
lit. The power supply is, conventionally, not shown, but is assumed to be connected to the lines labelled
‘0 V’ and ‘+5 V.’
+5 V
9,10,12,13,14
1
3
2
R1
R2
4
5
6
R3
74HC00
7
0V
Figure 5 Example use of two NAND gates to light an LED when both push-button switches are pressed. Pin 7 is connected to ground (0 V),
and pins 9, 10, 12, 13 and 14 to +5 V. R3 controls the current supplied to the LED when lit.
B1.3.3 The seven-segment display
Our experiment this week will use a number of light-emitting diodes that have been combined into a
single-digit display. Seven segments – each illuminated by a separate LED – form the shape from which
any digit from 0 to 9 may be formed; in addition, most ‘seven-segment’ displays have one or more LEDs
to illuminate decimal points, colons or the like.
It is usual to reduce the number of connections that must be made to the seven-segment display by
connecting together internally either all of the LED anodes or all of their cathodes; the display is
correspondingly known as being in the ‘common anode’ or ‘common cathode’ arrangement. Figure 6
shows a typical single-digit seven-segment display, the usual labelling of the segments, and the
connections in the common cathode and common anode arrangements.
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Figure 6 Seven-segment LED display: typical device; segment labelling; connections.
[Peter Halasz, h2g2bob, thelearningpit.com ]
B1.3.4 Binary to seven-segment display decoder
To investigate whether Boolean logic can be applied using digital logic gates, and to explore the
operation of logic i.c.s, we shall design a circuit to convert a two-bit binary number (00, 01, 10, 11) to
the digits of a seven-segment display. Two possibilities are suggested. Firstly, the display may show the
digits 0, 1, 2 and 3, according to the binary input; alternatively, it may show the lower-case letters a, b, c
and d. The circuits will use integrated circuits of the types 74HC00, 74HC02 and 74HC04, and will drive
either a common cathode or a common anode seven-segment display.
Before the laboratory session, you should work through the preliminary exercises below.
B1.3.5 Preliminary exercises
1 Show, by constructing their truth tables, that the operation of a NOR gate is the same as that of a
NAND gate with NOT gates before its inputs and after its outputs.
2 Work out truth tables for the conversion of two-bit binary numbers (i.e. two input connections,
corresponding to the less-significant and more-significant bits, each of which may be logic ‘0’ or ‘1’)
to the segments of a seven-segment display if, for the inputs 00, 01, 10, 11, the display is to read (a)
the digits 0, 1, 2, 3, and (b) the lower-case letters a, b, c, d.
3 Calculate the value of the resistor R3 (Figure 5) that will permit a current of 20 mA, if the voltage
across the lit LED is 3.0 V and the gate output voltage for logic ‘1’ is +5 V.
4 Choose one of the cases of question 2 above and design circuits of logic gates (using 2-input NAND
and NOR gates and NOT gates) that will work if the display is (a) common-cathode and (b) commonanode. You should find that, with a little thought, it will be possible to use only two or three different
integrated circuits in your designs. Remember to show in your circuits the power supply connections,
and the resistors needed if the current through each segment is to be limited as in question 3 above.
5 Although we have so far assumed that the inputs to logic gates will be either 0 V or +5 V, it is
interesting to consider their response to intermediate voltages. If you were responsible for specifying
the performance of, say, a NOT gate, what would you regard as the optimum form for the
dependence of the output voltage Vout upon the input voltage Vin? Illustrate your answer with a plot
of Vout as a function of Vin.
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B1.3.6 Laboratory: Setting up the breadboard
To allow an extra degree of characterization of digital logic devices, we shall use as our ‘binary’ inputs
two variable voltages, within the input range of 0—5 V, that are derived from the 5 V supply using
potentiometers: those provided should plug directly into the breadboards upon which we shall develop
our digital circuits. Note that it is sensible to turn off the power supply when making significant changes
to the breadboard wiring, as partial or mistaken connection could damage the integrated circuits.
Connect the 4 mm terminal posts your breadboard to the 5 V supply from the lab power supply,
and wire them to the outer bus rails of the breadboard. Plug the two potentiometers into the
board neatly towards one end, and connect the 0 V and +5 V supplies to the outer terminals of
each potentiometer. The output voltage will conventionally increase with clockwise rotation of
the potentiometer shafts if you connect to +5 V the terminal that is to the right when the
potentiometer is viewed from the shaft side with its terminals downwards.
Connect the 10 kΩ potentiometer outputs to a pair of the inner bus rails, and check that variable
voltages between 0 V and +5 V are obtained as the potentiometers are adjusted. By noting the
orientation of the slot in the end of the potentiometer shaft, record the voltage as a function of
shaft angle at approximately 45° intervals.
B1.3.7 Laboratory: Transfer characteristics of a HC logic gate
You have already considered in the preliminary exercises how a logic gate might respond to input
voltages that fall between the ideal values of 0 V and +5 V. We may now measure the behaviour of a
real device.
Insert a 74HC00 integrated circuit (containing four NAND gates) into your breadboard so that it
spans the gap between the groups of five connectors: use the ‘insertion tool’ and be careful not
to trap and bend the pins beneath the chip. If the pins are bent, straighten them gently before
trying to insert the i.c., and note that the leads of new chips are often splayed slightly and will
need to be bent a little to match the holes of the breadboard.
Use wire jumpers (or cut and strip your own wires) to link pins 7 and 14 to the appropriate power
supplies bus bars. Connect the inputs to three of the gates (pins 5, 6, 9, 10, 12 and 13) to +5 V; for
the time being, we shall not use these gates and simply wish their inputs to be defined.
Connect one of the inputs (i.e. pin 1 or 2) of the fourth gate to +5 V, so that the remaining input
and the output (pin 3) act as a NOT gate. Connect this remaining input to the output of one of
your potentiometers, and connect it also to one of the unused terminal posts on the breadboard.
Connect the output (pin 3) to the remaining unused terminal post.
Connect multimeters, via the terminal posts, to measure the gate input and output voltages
relative to 0 V.
Using the potentiometer to vary the input voltage, record and plot the dependence of the output
voltage upon the input voltage for (a) increasing input voltages and (b) decreasing input voltages.
You may wish to vary the spacing of your measurements to give more detail in regions of interest.
B1.3.8 Laboratory: The Schmitt trigger
The 74HC132 is also a quad 2-input NAND gate chip, and has the same pinout as the 74HC00. Its inputs,
however, are preceded by Schmitt trigger circuits that use positive feedback to ensure that they always
produce either a logic ‘0’ or a logic ‘1’.
Exchange the 74HC00 for a 74HC132 chip, and repeat your measurements.
To see how the Schmitt trigger works, replace the 74HC00, wire up a second gate as a NOT gate to
follow the first gate, rewire the terminal post to the new output, and connect a 100k resistor
between output and the original input. You can either add the resistor to the breadboard or
connect it between the terminal posts. Repeat your measurements once more.
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B1.3.9 Laboratory: Binary to seven-segment decoder
For the rest of the experiment, you will need to assemble the circuit that you designed in the
Preliminary Exercises. Check first whether the seven-segment display that you have been given is in the
common-cathode or common-anode configuration.
Remove the 74HC00 chip (or, at least, disconnect the connections to the gates) and set up on the
breadboard the circuit that you designed as Preliminary Exercise 4. For the binary inputs, use the
potentiometer outputs that should already be connected to a pair of the inner bus rails. Connect
the seven-segment display to the gates that drive it using resistors to limit the current according
to your calculations for Preliminary Exercise 3. Don’t forget to connect power supplies to the logic
chips, and to connect the common connection of the display to the appropriate power rail.
Check that your circuit displays correctly in the four logic states 00, 01, 10 and 11 (potentiometers
fully left-left, left-right, right-left and right-right).
Explore how the displayed digits change as you vary the potentiometers between logic levels 0
and 1. You may need some patience and delicate fingers for this!
Once you have finished investigating your circuit and making notes in your logbook as you do so, write a
paragraph summarizing your findings and conclusions. Feel free to add some photographs of your
working circuit if you wish.
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