Power MOSFET
Electrical Characteristics
Power MOSFET in Detail
4.
Electrical Characteristics
4.1
Terminology
The following is an explanation of main items used to evaluate power MOSFET performance.
(1) |Yfs|: forward transfer admittance
|Yfs| = ΔID/ΔVGS
|Yfs| expresses power MOSFET amplification factor
(2) Vth: gate threshold voltage
If VGS (OFF) is the gate-source voltage in the cut-off state, and VGS (ON) is the gate-source bias
voltage when drain current is flowing, then the following relationship can be established.
VGS (OFF) < Vth < VGS (ON)
(3) RDS (ON): drain-source ON resistance
This is the equivalent of the collector-emitter saturation voltage VCE (sat) of a bipolar
transistor, and is used as a criterion for determining dissipation in the ON status.
(4) VDS (ON): drain-source ON voltage
This is a criterion for determining dissipation in the ON status, as with RDS (ON), and is
expressed as a voltage value.
(5) Ciss, Crss, Coss: capacitances
Ciss, Crss and Coss are input capacitance, reverse transfer capacitance and output capacitance,
respectively. These capacitances restrict the usable frequency and switching speed when a power
MOSFET is used for switching operations.
The index = |Yfs|/Ciss (s−1) is the equivalent of the cutoff frequency fT of a bipolar transistor.
However, normally the following expression is used to define the theoretical cutoff frequency:
f (max) = |Yfs|/2 π {Ciss + (1 + Av) Crss}
4.2
Power MOSFET Temperature Characteristics
The transfer function of power MOSFETs is shown by the differential coefficient of the ID – VGS
curves shown in Figure 4.1.
In the large current area, the temperature coefficient of the transfer function is negative, therefore,
the forward transfer admittance |Yfs| decreases when the internal (channel) temperature increases;
so current concentration and failure due to thermal run-away don’t occur easily even if a large drain
current flows due to the output fluctuates.
Caution must be exercised concerning the temperature dependence of the drain-source ON
resistance. This ON resistance approximately doubles for a temperature increase of 100°C (Figure
4.2). Thus, it is necessary to account for an induced temperature increase to select a heat sink with an
appropiate thermal resistance φf.
1
Power MOSFET in Detail
70
Tc = 100°C
12
Common source
VDS (ON)
−55
VDS = 10 V
10
8
6
4
2
0
1
2
3
4
5
6
Gate-source voltage
7
8
9
15
VGS = 10 V
8
12
6
10
4
5
2
ID = 1 A
0
−60
10
−40
VGS (V)
−20
0
20
40
60
80
100
Case temperature Tc (°C)
Figure 4.1 ID – VGS Characteristics
4.3
10
Drain-source on voltage
Drain current ID (A)
14
25
(V)
12
Common source
Figure 4.2 VDS (ON) – Tc Characteristics
Power MOSFET Electrostatic Capacitance Characteristics
The physical construction of a power MOSFET is such that the gate is completely isolated from the
silicon oxide film; therefore, the capacitances between the drain, gate and source terminals are as
shown in Figure 4.3 (a).
Gate-drain capacitance Cgd and gate-source capacitance Cgs are determined by the gate electrode
construction. In addition, drain-source capacitance Cds is determined by the junction capacitance of
the PN junction based on the double diffusion construction.
Input capacitance Ciss = Cgd + Cgs, output capacitance Coss ∼
− Cds + Cgd, and reverse transfer
capacitance Crss = Cgd are important characteristics for power MOSFETs.
Figure 4.4 shows the dependence of Ciss, Crss and Coss on drain-source voltage VDS.
(a) Power MOSFET capacitance
(b) Simple equivalent circuit including
parasitic devices
rg
Drain (D)
Crss = Cgd
Gate
Drain
Cgs
Cgd
Gate (G)
Cds
gmVG
Cds
r1
Cgs
r3
r2
Source
Source (S)
Input capacitance: Ciss = Cgd + Cgs
rg: gate electrode parasitic resistance
Output capacitance: Coss = Cds + Cgd
r1: equivalent resistance of the source and channel areas
Reverse transfer: Crss = Cgd
r2: equivalent resistance of the high resistance layer
adjacent to the drain
r3: modulated part of the channel resistance
Input capacitance: Cin = Cgs + (1 + AV) Crss
Figure 4.3
2
Power MOSFET in Detail
In the driving of a power MOSFET,
the switching characteristics fluctuate
due to the input capacitance Ciss and
10000
the drive circuit impedance.
6000
4000
Since gate current flows between the
(pF)
gate and source to charge the input
Capacitance C
capacitor, the lower the drive circuit
impedance the faster the switching
speed.
Also, there is almost no temperature
dependence of the capacitors (Ciss, Crss,
2000
Ciss
1000
600
400
Coss
200
Common source
60 f = 1 MHz
Coss).
40 Tc = 25°C
0.3
6
Power MOSFET Switching
1
2
4
6
10
Drain-source voltage
20
40
100
VDS (V)
Characteristics
Since power MOSFETs are majority
Figure 4.4 Capacitance – VDS Characteristics
carrier devices, switching performance
is their main characteristic of interest. The switching speed of a power MOSFET is much faster than
that of a bipolar transistor and its high-speed, high-frequency operation is outstanding.
This characteristic is utilized in switching regulators (f = 1 kHz to 1 MHz) and in motor controls.
As mentioned before, two important features of power MOSFETs are that they have no storage time
dependence, and that their capacitance doesn’t depend on temperature; therefore, their switching
characteristics are not hardly influenced by temperature fluctuations.
Figure 4.5 shows a typical switching time measurement circuit and input/output waveforms.
(a) Measurement circuit
(b) Input/output waveforms
Pulse width
VDD
RL
Pulse
generator
RG
50 Ω
FB
90%
Output
VOUT
Input
Waveform
50%
50%
10%
0
VIN
50 Ω
4.4
Crss
100 VGS = 0
90%
90%
Output
Waveform
10%
0
td (on)
tr
ton
10%
tf
td (off)
toff
Figure 4.5 Switching Time Measurement Circuit and Input/Output Waveforms
3
Power MOSFET in Detail
The definitions of the symbols used for input and output waveforms for switching time are
explained below.
(1) td (on): turn-ON delay time
The charging time required to raise the voltage of input capacitance Ciss to the value of the
threshold voltage Vth.
(2) tr: rise time
The charging time required to raise the gate-source voltage from the value of gate threshold
voltage Vth to the specified VGS level.
(3) td (off): turn-OFF delay time
The discharge time required to lower the gate-source voltage from the drive voltage of the
saturation area to the specified VGS level of the linear area.
(4) tf: fall time
The time required to lower the gate-source voltage from the level of the drive voltage of the
saturation area to the value of the gate threshold voltage level Vth, and to raise the output
voltage to the supply voltage level.
As described above, the switching time can be divided into four different times. In addition, it
should be noted that ton is expressed by adding the turn-ON delay time td (on) to the rise time tr,
and that tOFF is expressed by adding the turn-OFF delay time td (off) to the fall time tf.
td (on) + tr = ton
td (off) + tf = toff
Figure 4.6 shows the switching characteristics (switching time versus drain current ID).
1000
800
10 V
600
0
RL
50 Ω
Switching time (ns)
10 μs
toff
400
Measurement
ID Outcircuit
put
Input
VDD
200
100
80
60
40
Repetitive
Duty <
= 0.5%
tf
ton
tr
Common source
∼ 200 V
VDD −
Tc = 25°C
20
0.3
1
2
4
6 8 10
20
40
Drain current ID (A)
Figure 4.6 Switching Characteristics
4
Power MOSFET in Detail
4.5
Gate Charge
4.5.1
Gate Charge Characteristics
Power MOSFETs are driven by a voltage applied between the gate and source, and the ease with
which a power MOSFET can be driven is expressed by the size of the charge stored in the gate.
td (on) is the time required for an input signal to be applied, the input capacitor to be charged
through the signal and gate resistors, and the gate voltage VGS to exceed the threshold voltage. This
is expressed as
td (on) ∝ Cgs × (rg + RG)
Here RG is the signal resistance and rg is the gate electrode parasitic resistance.
At td (on), the gate charge is expressed as
Qgs (on) ∼
− Cgs･VGS’
During the interval tr, the power MOSFET starts to operate; the input capacitance increases due to
the mirror effect and tr becomes longer than td (on), as follows:
tr∝ {Cgs + (1 + AV) Crss} × (rg + RG)
During the tr interval, the gate charge increases by the amount of reverse transfer capacitance Crss,
as follows:
Qon ∼
− {Cgs + (1 + AV) Crss}･VG
If the transient flow of gate charging current is iG (t), then the total charge Qtotal can be
determined by using the following equation:
Qtotal = ∫ 0t i G (t) dt
5
Power MOSFET in Detail
4.5.2
Calculating the Total Gate Charge
When the power MOSFET is switched ON, the gate current iG (t) flows to charge the gate-source
and gate-drain capacitors.
To determine the total gate charge under the circuit conditions shown in Figure 4.7, consider
allowing a small gate current of iG (t) = 1 mA (constant) to flow for 12 μs and then stopping the flow of
this gate current.
(b) iG (t), VGS (t), VDS (t) waveforms
(a) Total gate charge measurement circuit
Set VGG so that a
certain drain
current flows.
Gate Current
iG (t)
0
VDD = 200 V
1 mA
t’on = 12 μs
Driver FET
VG
Gate-Source
Voltage VGS (t)
VGG
VG
200 V
VDS
Drain-Source
Voltage VDS (t)
Constant-current
power supply
0
Drain-Source ON
Voltage VDS (on)
Figure 4.7 Total Gate Charge
The total gate-source charge Qtotal will be as follows:
t'
Qtotal = ∫ 0 on i G (t) dt
From the constant current iG (t) = 1 mA, the gate current is determined as follows.
−
iG (t) = IG = 1 mA = 1 × 10 3 A
−
Also, if t’on = 12 μs = 12 × 10 6 s, then
t'
Qtotal = ∫ 0 on i G (t) dt = IG ⋅ t'on
−
−
= 1 × 10 3 × 12 × 10 6
−
= 12 × 10 9 (C)
This Qtotal indicates the charge required to switch the MOSFET ON.
6
Power MOSFET in Detail
4.6
Source-Drain Diode
Due to their construction,
double-diffusion-construction power
MOSFETs have a parastic diode between
10
Common source
the source and drain.
(A)
T = 25°C
Drain reverse current IDR
The ratings for the forward current
IDR (Figure 4.8) and the reverse
breakdown voltage for this parastic diode
are the same as for drain current ID and
drain-source voltage VDSS for a power
MOSFET under the ideal heat radiation
D
8
IDR
G
6
S
4
1
VGS = 3 V
2
0
condition.
−1
The reverse recovery time trr for this
0
0
diode is similar to that for a Fast
−0.2
−0.4
−0.6
−0.8
Drain-source voltage
−1.0
−1.2
VDS (V)
Recovery Diode (FRD). Figure 4.9 shows
a reverse recovery time measurement
Figure 4.8 IDR – VDS Characteristics
circuit for the parastic diodes of power
MOSFETs.
(a) Reverse recovery time measurement circuit
D.U.T.
IDR
C2
C1
L1
Rg
P.G.
VGS
(b) Reverse recovery time (trr) and charge (Qrr)
+15 V
VGS: 0
−15 V
di/dt = 50 A/μs
IDR
IDR: 0
IDR: 0
VF
Qrr
10%
Irr
Vrr
*Qrr ∼
−
1
× trr × Irr
2
trr
Figure 4.9 Reverse Recovery Time Measurement Circuit for the Parastic Diodes of Power MOSFETs
7
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