Introduction to
HW/SW Codesign
Part of
HW/SW Codesign of Embedded
Systems Course (CE 40-226)
Winter-Spring 2001
Codesign of Embedded Systems
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Today programme

Introduction to HW/SW Codesign
 Distinguishing features of electronic
systems
 System-level codesign issues
Reference:
G. De Micheli, M. Sami, “Hardware/Software Co-design”, NATO
ASI Series, Kluwer Academic Publishers, 1996.
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Introduction to
HW/SW Codesign
Distinguishing features of
electronic systems
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Distinguishing features of
electronic systems
Application
Domain
Hardware
Technology
Degree of
Programmability
Level of
Integration
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Application domains
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General-purpose computing systems
Dedicated computing and control
systems
Emulation and prototyping systems
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Application domains (cont’d)
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GP computing systems
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Traditional computers
End-user can program them
Support applications of different kinds
Dedicated computing and/or control systems
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Specific target applications
Limited programming access for the user
Dedicated software programs
Known as Embedded Systems
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“Control functions” or “Data comm. and processing” or both
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Application domains (cont’d)
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Emulation and prototyping systems
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Programmable HW technology
Hardware configuration by HW compilers
(synthesis systems)
Specialized users program them
Intermediate points of the design and
manufacturing of a product
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Degree of programmability
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Programmability at the
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Application level
Instruction level
Hardware level
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Degree of programmability
(cont’d)
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Application level
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Most restricted level
User have to use specialized language
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VCR - Automated navigation systems
Instruction level
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Personal computer users
Writing, compiling and executing programs
Processor architecture defines degree of
programmability
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Degree of programmability
(cont’d)
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Hardware level
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Configuring HW after manufacturing
Micro-programming: emulation of other ISAs
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Common for DSPs, not for ISPs (esp. RISC)
FPGAs
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Degree of programmability
(cont’d)
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Programmability
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Increases applicability, but not performance
Top performance in
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GP computing: super-scalar RISC architectures
Dedicated applications: ASICs
Some app. domains (ex. Comm.)
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ASIPs: specialized instruction-level
programmable processors
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Midway between ASIC and ISP: Performance, Power,
Production volume
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Technology
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Digital-system components have
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Different scale of integration
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Different fabrication technology
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Discrete and integrated components
Bipolar, CMOS
To us, technology affects field-programmability
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Storing programs in memory
Configurable HW
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One-time configurable
Re-configurable
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Level of Integration
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Digital systems are
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Advantages of higher integration
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Lumped => System-on-Chip
Distributed
Higher reliability
Lower power budget
Increased performance
Disadvantages
 Larger chip sizes. More complex debugging
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Introduction to
HW/SW Codesign
System-level Co-Design Issues
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General-purpose
computing systems
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ISP: Primarily in general-purpose computing
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Codesign of ISP is strange
Architectural support for OS
Compiler development: Retargetable, Optimizing
Codesign areas:
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organizational choices: pipelines, concurrency, memory
hierarchy
Instruction-set selection
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Performance
Compatibility
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Dedicated
computing and control systems
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Data-processing systems
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GP DSP / ASIP
ASIP
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Less compatibility, more performance
Need for application-specific compilers
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Retargetable compilers
Computer-Aided compiler generation
 fixed-point arithmetic operations
Hence, use assembly
Today design time: SW > HW
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Dedicated
computing … (cont’d)
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Embedded control systems
Sensors
Memory
CPU
Hardwired Unit
Random Logic
Timers
A/D
D/A
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Actuators
Embedded System
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Dedicated
computing … (cont’d)
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Control systems
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Often have a data-processing component
Reactive systems
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RT: hard/soft
Timers
Safety and reliability more important than
performance
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Safety: Formal verification+ System-level testing
Reliability: Redundancy
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Emulation and
prototyping systems
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Codesign application 1:
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SW accelerators/coprocessors
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Specific operations: floating-point ops.
Critical loops: exploiting local parallelism
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for(j=0; j<N; j++) a[j] = a[j] + b[j];
for(j=1; j<N; j++) a[j] = a[j] + a[j-1];
Coprocessors based on programmable HW
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Example: PAM (PeRLe-0, PeRLe-1)
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Emulation and
prototyping systems (cont’d)
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Major codesign problems:
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Identifying critical parts of SW
Compile critical SW parts for HW emulation
Codesign application 2:
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Acceleration of system-level simulation by
HW emulation
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Emulation and
prototyping systems (cont’d)
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Codesign application 3:
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Computer-aided prototyping
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Validate HW before manufacturing to avoid
expensive redesign
Prototyping of complex digital systems (HW +
SW)
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What we learned today
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Categorized digital systems
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This helps in decision-makings in codesign
strategies and algorithms
Reviewed problem areas within each
application domain
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Complementary notes
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Verilog Short Course
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Instructor:
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Farshid Soheili, Emad Semicon. Co.
First session
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Saturday: Esfand 6th
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“Avecina-16” room
VHDL short course will also be held
soon
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Complementary notes (cont’d)
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Optional paper presentation
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Any subtopic from second topic of today
programme:

System-Level Co-Design Issues
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