CS 320
Final Exam
Take Home Portion
Name___________________
April 27, 2016
Please down load this document as a doc file and type your answers below each
question.
1. A computer is multi-programmed. Explain the difference between a thread switch and
process switch. Discuss what has to be saved in each case.
2. Self-modifying code refers to a program which modifies its own instructions in
memory by writing over opcodes and/or operands and runs them again. In the very early
days of computing – say in the 1950s this was a relatively common practice. Give two
reasons why this is no longer done.
3. Nearly every commercial computer today has a stack. No other data structure has its
prominence. Why?
4. The figure below is that of a single SRAM cell. Explain how this cell can store a 1 or
a zero and how it can be changed.
5. Answer the following questions about virtual memory systems.
A) Is the only one virtual address space or does each program have its own virtual
address space. Explain why your answer is true.
B) almost all virtual memory systems use write back as opposed to write-through
even though this make it possible that some data will be incoherent. Why is this
true?
6. Many machines are microprogrammed. Only a few are user microprogrammed. User
microprogrammed machines are typically bit slice architectures and the user develops the
assembly language instruction set by writing her own microcode.
A) What are the advantages of doing this?
B) Why is this not popular and widely available?
7. The following diagram shows the pinout connections for a DRAM chip. Answer the following
questions:
A) How many words are stored in this chip. Explain
your answer.
B) How many data lines does each word have?
8. The ARM Cortex microcontrollers use flash memory to hold the program. Flash
memory, in general is slow compared to SRAM or DRAM. There are two ways to
address this problem. A) We could install an SRAM cache memory so that the
instructions could be cached and ready for easy access. B) We could install a memory
accelerator processor which fetches 128 bits from memory at a time. Since a word on the
ARM processor is 32-bits this means we fetch 4 words (instructions) in parallel. The
accelerator module then feeds these to the processor as needed. The ARM uses option B.
Give two reasons why this choice was made.
9. Answer the questions below about the following binary number.
0011 1001 1100 0001 0010 0101 0101 0011
A) Rewrite this as a hexadecimal number _____________________
B) Rewrite this as an octal number ___________________
C) If this number represents four ASCII characters what are they (ignore the parity
bit) ___________________
D) If this is a floating point number in IEEE single precision format what is the
number? ___________________
E) If this is a BCD number what is the number? (us X for illegal numbers)
___________________
10. Explain the difference between a linear address space, a paged address space, and a
segmented address space.
11. Suppose a memory chip is organized as 1G x 4. Answer the following questions:
A) How many bits can be stored on the chip? _________
B) How many address lines are needed to address all of the memory on the chip?
____________
C) How many data lines are needed? ________
D) How many chips would it take to make a memory system that is 1 G x 32? _____
12. Answer the following questions related to the size of a program and memory space.
A) What is it that determines the total amount of virtual memory space a computer
system can have?
B) What is it that determines the size of the largest program that can be executed on a
single machine that has only one core?
C) What is it that ultimately limits the number of programs that a given machine can
run?
13. Explain how a 32 bit address gets divided between the tag, slot, and word for a system with a
cache that is 64K Bytes and is 4 way set associative. Assume that each slot holds 8 words (a word
in this case is a byte).
14. List at least 5 characteristics of RISC machines, at least 5 characteristics of CISC machines,
and summarize the current state of computer architecture with regard to the RISC/CISC
controversy.
15. Interrupts may originate in software or in hardware. Explain the sequence of events that
happens when an interrupt occurs and explain the difference between a software and a hardware
interrupt.
16. On many operating systems the most frequency used files are placed on the outer tracks of
the disk. Answer the following questions:
A) Why would this improve performance?
B) If the system uses a fixed number of sectors per track does it matter if the information is
placed on the inner or outer tracks? Explain.
17. A CPU and a bus system is shown in the figure below. Write the micro-operations
needed to do the assembly instruction: Add AC, M where M is a direct memory address.
18. The figure below shows the architecture of the Intel 8085. Answer the following
questions:
A) The 8085 used isolated I/O. What feature of the architecture makes this apparent?
B) The 8085 has a built in UART. How is this shown in the diagram?
C) This processor has a 16-bit address bus but the bus is shown in two parts AD0-AD7
and A8-A15. Why is it broken up this way.
D) What is the purpose of the Hold and HldA lines?
E) The processor originally used a 2 MHz crystal to determine the cycle time. A typical
instruction required 5 cycles to complete. What is the estimated MIPS rate?
19. Consider a program that has five tasks. The task have different execution times wotj
T1 = 2000 cycles, T2 = 4000 cycles, T3 = 6000 cycles, T4 = 8000 cycles, and T5 =
10000 cycles. Answer the following questions:
A) If these five tasks are run on a single processor what is the execution time in
cycles?
B) Ignoring all communications and synchronization costs and assuming that the
tasks can be run in parallel what is the best speedup rate I could get if I ran the five
tasks on two cores?
20. Five years from now (2021) the personal computer will be very different from what
it is today. What are the most likely changes that you would expect to take place in the
next five years. (Be creative).