Ultra-Wide Band Digital Chaotic Circuits - Part I:
Introduction and Implementation
Rui Zhang, Hugo L. D. de Souza Cavalcante, Zheng Gao, Daniel J. Gauthier, and Joshua E. S. Socolar
Department of Physics, Duke University
Matthew Adams and Daniel P. Lathrop
Institute for Research in Electronics and Applied Physics, University of Maryland
Introduction
Systems naturally described by a set of boolean states may display
sensitive dependence to small perturbations. Here we used very
simple electronic devices, composed of commercially available,
high-speed logic gates to generate chaotic behavior with
continuous time Boolean states.
Digital Chaotic Circuits
2
Schematics for digital chaotic circuit
10
10
10
Vcc
3
Simulation
To model the observed behavior, we start with Boolean delay equations
based on the form introduced by Ghil et.al [1]: Boolean delay equations
are evolution equations for vector Boolean variables x(t):
-1
-2
-3
0
0 .5
1
1 .5
where fi is logic functions and τin are constant delay times.
Simulations show that this model generates only periodic or quasiperiodic solutions. To predict chaotic behaviors similar to that observed
in the experiment, we need to address short pulse rejection and
degradation effect where the delay time τin through logic gates depends
on its pulsewidth instead of being constant.
2
Frequency (GHz)
It shows a broad power spectrum extending from DC to 2 GHz.
Capacitor
4mm
4
Spectrum of the signal
Spectrum (a.u)
1
Non-ideal behaviors in real logic gates
Stimulated chaotic generation and the spectrum
Short pulse rejection
XOR gate
input2
output
0
0
0
0
1
1
1
0
1
1
1
0
2
Short pulse rejection effect
determines the highest
frequency components
generated by the circuit.
1
0
-1
150
155
160
165
Time (ns)
Photograph of circuit
We recorded the temporal evolution of the voltage at a point in
the circuit.
Degradation effect
The degradation effect leads
to the propagation delay of a
pulse depending on its
pulsewidth.
3
2
1
References
0
10
20
30
40
50
60
70
80
90
Time (ns)
Temporal evolution of the circuit shows chaotic behavior with clearly
defined discrete states of voltages.
0
120
130
140
150
160
170
180
190
200
Time (ns)
Delay time of a pair of inverters
2 .2
2
1 .8
10
-1
10
-2
0
1 .6
1 .4
0
0 .5
170
Spectrum (a. u)
145
Delay time (ns)
140
1
110
-2
True table Of XOR
Output (V)
In p u t
Output (a. u)
τ1 to τ5 stand for different delay times
O u tp u t
3
Output (a. u)
Photograph of logic gate
input1
When chaotic signal is
input to a gate, short pulses
do not pass through.
GND Output
Input
0 .5
1
1 .5
2
Frequency (GHz)
0
1
2
3
4
5
6
7
Input pulsewidth (ns)
1 - “Boolean difference equations, I: Formulation and dynamical behavior”, Dee, et al., SIAM J.
Appl. Math. 44, 111 (1984).
2 - “Ultra-Wide-Band Digital Chaotic Circuits - Part II: Characterization and Details”, H. L. D.
de S. Cavalcante, et al., Dynamics Days 2009 P62.
3.- “Ultra Wide Band Antenna Design for Transmission of a Digital Chaotic Signal”, S. D.
Cohen, et al., Dynamics Days 2009 P9.
5
Conclusion
Digital chaotic circuit with delayed feed back can generate a nonrepeating pattern, which shows sensitivity to initial conditions. Those
circuits can be used as a building block in secure spread-spectrum
communication systems or as an ultra-wide-band sensor [2,3].