Project Name

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The Implementation of
Delta-Sigma Modulation in Digital-to-Analog
Converter
Group member:
Zhaoxin Mamengduo Cfang Stanley
1
Project Idea
Motivation: EE 505 CMOS Data Conversion circuits
During the process of digital-to-analog converting
 Use Delta-sigma modulator to push noise in music to high
frequency band
 Use speaker/headphone as the low-pass filter to filtrate high
frequency white noise
2
Top Level Components
PCM(digital)
In Serial
Delta-sigma
modulation
Low pass
filter
3
Pulse Width Modulation
(PWM,digital) Signal In
Serial
Level-shifter for DVD Output Signal
 Output signal(from DVD) voltage:
-0.5V~+0.5V
Schmidt trigger:
SN74LS14N
rheostat
4
Demo
 Film1 Play CD
http://www.youtube.com/watch?v=582E_OXeVOU
 Film2 Input signal voltage shift
http://www.youtube.com/watch?v=uBhcLwn46QM&fea
ture=youtu.be
 Film3 Sleep mode
http://www.youtube.com/watch?v=Q74URMVuhF8&fe
ature=youtu.be
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The Structure of DAC module
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Input: PCM
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The 3-stage Delta-sigma Modulation
PCM
 Y1=X+(1-Z-1)•Q
 Y2=-Q1+(1-Z-1)•Q2
 Y3=(-Q2)+ (1-Z-1)•Q3
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 Y= X+(1-Z-1)3•Q3
PWM
Eleven PWM Signals
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Output: PWM
 PWM: digital signal but has analog info.
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Matlab Simulation:
Noise is pushed to higher frequencies
11
Using Filter to Cutoff Noise
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One Order Noise Shaping Model
 Q=Y-U
 U-Y=-Q
 U=X-Q
13
One Order Noise Shaping Model
 U(n)=X(n)-Q(n-1)
 Q(n)=Y(n)-U(n)
 Y(n)=X(n)-Q(n-1)+Q(n)
=X(n)+Q(n)-Q(n-1)
 Q(n)-Q(n-1)=(1-Z-1)•Q
 Y=X+(1-Z-1)•Q
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The 3-stage Delta-Sigma Modulation
 Y1=X+(1-Z-1)•Q
 Y2=-Q1+(1-Z-1) •Q2
 Y3=(-Q2)+ (1-Z-1)•Q3
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 Y= X+(1-Z-1)3•Q3
Clock Synchronization with DVD
 Input signal(from DVD) is in serial:
Need to decode SPDIF signal
 So need to synchronize clock with DVD
16
Clock Synchronization
and Data Extraction
17
Clock Synchronization
 44.1kHz frame rate×2 channel ×32 data×2 phase
=5.6448MHz
 Keep detecting :
temp1=temp2=temp3 & temp4=temp5=temp6
 Then generate sampling clock @ center pulse
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Clock Synchronization(cont.)
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Data Extraction
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Data Extraction(cont.)
 Keep detecting frame header
11100010 or 00011101 | 11100100 or 00011011
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Sleep Mode(Power Saving)
system
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Volume Control
 Matlab verification
 Lower volume: right shift
 Larger volume: left shift
 Debounce module( real world)
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Reference
 http://en.wikipedia.org/wiki/Delta-sigma_modulation
 http://www.cscamm.umd.edu/programs/ocq05/adams/ad
ams_ocq05.pdf
 http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.ht
ml
 http://www.intersil.com/data/an/an9504.pdf
 http://hephaestusaudio.com/media/2009/07/MASHDelta-Sigma.pdf
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Thank you!
Q and A
25
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