Memory Management
- Memory Basic Concepts:
1234-
Main memory and registers are only storage .CPU can access directly
Register access in one CPU clock (or less) but Main memory can take many cycles
Cache sits between main memory and CPU registers
Protection of memory required to ensure correct operation
- What is the input queue?
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Collection of processes on the disk that are waiting to be brought into memory to run the
program.
- How to define the Logical Address Space?
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Using a pair of base and limit registers. (N.B A Process Logical Space is from base to
base +limit).
Size=base+limit.
- What is the difference between logical and physical address?
Logical (virtual ) Address
Physical Address
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generated by the CPU
Logical and physical addresses are
the same in compile-time and loadtime address-binding schemes
logical (virtual) and physical
addresses differ in execution-time
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address seen by the memory unit
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address-binding scheme
Logical and physical addresses are the same in compile-time and load-time
address-binding schemes
logical (virtual) and physical addresses differ in execution-time address-binding
scheme
- What is the Memory-Management Unit (MMU)?
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It is a hardware device that maps virtual to physical address
In MMU scheme, the value in the relocation register is added to every address generated
by a user process at the time it is sent to memory
The user program deals with logical addresses; it never sees the real physical addresses
(Dynamic relocation using a re-location registers)
- What is the swapping?
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A process can be swapped temporarily out of memory to a backing store, and then
brought back into memory for continued execution.
Modified versions of swapping are found on many systems (i.e., UNIX, Linux, and
Windows)
System maintains a ready queue of ready-to-run processes which have memory images
on disk
- What is a backing store?
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Fast disk large enough to accommodate copies of all memory images for all users.
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It must provide direct access to these memory images
- What is the Roll out, roll in policy?
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It is a swapping variant used for priority-based scheduling algorithms
lower-priority process is swapped out so higher-priority process can be loaded and
executed
- What is Contiguous Allocation?
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Main memory usually divided into two partitions:
1- Resident operating system, usually held in low memory with interrupt vector
2- User processes held in high memory
- What are the two types of partition allocation?
Single-partition allocation
Multiple-partition allocation
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Relocation-register scheme used to
protect user processes from each
other, and from changing operatingsystem code and data.
Relocation (Base) register contains
value of smallest physical address
Limit register contains range of
logical addresses – each logical
address must be less than the limit
register.
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Hole – block of available memory;
holes of various size are scattered
throughout memory
When a process arrives, it is
allocated memory from a hole large
enough to accommodate it
Operating system maintains
information about:
a) allocated partitions
b) free partitions (hole)
- How to solve the Dynamic Storage-Allocation Problem? Or How to satisfy a
request of size n from a list of free holes?
First Fit
Best Fit
Worst Fit
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Allocate the first
hole that is big
enough
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Allocate the smallest
hole that is big
enough; must search
entire list, unless
ordered by size
Produces the
smallest leftover
hole
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Allocate the largest
hole; must also
search entire list
Produces the largest
leftover hole
First-fit and best-fit better than worst-fit in terms of speed and storage utilization.
- What are the two types of fragmentation?
External Fragmentation
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Total memory space exists to
satisfy a request, but it is not
contiguous
External fragmentation is the
phenomenon in which free storage
becomes divided into many small
pieces over time.
Internal Fragmentation
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Allocated memory may be slightly
larger than requested memory; this
size difference is memory internal
to a partition, but not being used
Internal fragmentation occurs
when storage is allocated without
ever intending to use it.
This space is wasted. While this
seems foolish, it is often accepted in
return for increased efficiency or
simplicity. The term "internal"
refers to the fact that the unusable
storage is inside the allocated
region but is not being used.
- How to reduce external fragmentation?
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Reduce external fragmentation by compaction
Shuffle memory contents to place all free memory together in one large block
Compaction is possible only if relocation is dynamic, and is done at execution time
- What is paging?
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Paging is a memory-management scheme that permits the physical-address space of a
process to be noncontiguous, process is allocated physical memory whenever the latter is
available.
- How to apply paging?
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Divide physical memory into fixed-sized blocks called frames (size is power of 2,
between 512 bytes and 8,192 bytes)
Divide logical memory into blocks of same size called pages
Keep track of all free frames
To run a program of size n pages, need to find n free frames and load program
Set up a page table to translate logical to physical addresses
- What is the effect of increasing frame size on internal and external
fragmentation?
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Paging itself is a form of dynamic relocation.
When we use a paging scheme, we have no external fragmentation
However, we may have some internal fragmentation. Notice that frames are allocated as
units. If the memory requirements of a process do not happen to fall on page boundaries,
the last frame allocated may not be completely full. For example, if pages are 2,048
bytes, a process of 72,766 bytes would need 35 pages plus 1,086 bytes. It would be
allocated 36 frames, resulting in an internal fragmentation of 2048 - 1086 = 962 bytes. In
the worst case, a process would need n pages plus one byte. It would be allocated n + 1
frames, resulting in an internal fragmentation of almost an entire frame.
If process size is independent of page size, we expect internal fragmentation to average
one-half page per process.
This consideration suggests that small page sizes are desirable.
- What is the Address Translation Scheme?
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Address generated by CPU is divided into:
Page Number (P)
Page Offset (d)
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used as an index into a page table
which contains base address of
each page in physical memory
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combined with base address to
define the physical memory address
that is sent to the memory unit
- For given logical address space 2m and page size 2n
(To understand the Address Translation Architecture, paging, and allocating free
frames Check Slides 213:215)
- How to implement the page table?
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Page table is kept in main memory
Page-table base register (PTBR) points to the page table
Page-table length register (PRLR) indicates size of the page table
In this scheme every data/instruction access requires two memory accesses. One for the
page table and one for the data/instruction.
- What are the different Page Table Structures? (you don’t have to study the
hashed & the inverted)
Hierarchical Paging
Hashed Page Tables
Inverted Page Tables
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Break up the logical
address space into
multiple page tables
A simple technique is
a two-level page table
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Common in address
spaces > 32 bits
The virtual page number
is hashed into a page
table. This page table
contains a chain of
elements hashing to the
same location.
Virtual page numbers are
compared in this chain
searching for a match. If
a match is found, the
corresponding physical
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One entry for each real
page of memory
Entry consists of the virtual
address of the page stored
in that real memory
location, with information
about the process that owns
that page
Decreases memory needed
to store each page table,
but increases time needed
to search the table when a
page reference occurs
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frame is extracted.
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Use hash table to limit the
search to one — or at most
a few — page-table entries
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- What are the Shared Pages?
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An advantage of paging providing the possibility of sharing common code.
This is particularly important in a time-sharing environment.
Systems that use inverted page tables have difficulty implementing shared memory
- How do Shared Pages work?
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Shared code:
One copy of read-only (reentrant) code shared among processes (i.e., text editors,
compilers, window systems).
Shared code must appear in same location in the logical address space of all processes
Private code and data:
Each process keeps a separate copy of the code and data
The pages for the private code and data can appear anywhere in the logical address space
(Text Editor Example: Only one copy of the editor needs to be kept in physical memory.
Each user's page table maps onto the same physical copy of the editor, but data pages are
mapped onto different frames).